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Materials for electronics and optoelectronic applications

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Nitride semiconductors for high power and high frequency electronic devices II

Introduction and scope:

The symposium “Nitride semiconductors for high power and high frequency electronic devices II“ focuses on nitride high power devices and challenges related to electronic transportation, energy efficiency, terahertz emission and substrates for such applications.

Physical properties of GaN make this wide-bandgap material very attractive for microelectronics, optoelectronics, and solar applications. Today, it is well acknowledged that, thanks to its very high breakdown field, high saturation velocity, high electron mobility, and respectable thermal conductivity, GaN material is a revolution in the semiconductor sector.

The deployment of nitride technologies is key for Europe to strengthen its competitiveness while addressing societal challenges on transportation, energy efficiency, and renewable energy. Manufacturing capabilities have been limited by the compatibility of the wafer with silicon production environment: diameter, cost, handling, material quality.

The scope of this Symposium covers the whole value chain of GaN-based devices i.e. from material & equipment to device makers and power devices as well as creation of their production. The concept of this Symposium is to design the expected technological challenges for the GaN based electronics, such as:

  • requirements for competitiveness to Si:how to bring GaN material and technology to a level compatible with high volume manufacturing in term of yield, robustness and cost;
  • adequate device manufacturing: thermal management, high voltage, device manufacturing, challenge of reliability (GaN defects, instability, growth temperature);
  • GaN-based or GaN epi compatible substrates quality and performance in terms of defectivity, reliability, thickness, conductivity, manufacturability, diameter, yield.

Gallium nitride, already selected for LED and High Performance Solar Cell markets, is also particularly attractive for power applications in electronic devices operating at high temperatures, high power, in a harsh environment and very high frequencies. However, there are some barriers connected to GaN-based devices. The first is the availability, as few GaN transistors are available in mass production. Competing manufacturers’ products are non-standard, and there are no second-sources. Second, the technology lacks maturity so far. Overall device performance and GaN material defect rates need improvement.

Hot topics to be covered by the symposium:

  • Substrates for GaN based electronic devices
  • Epitaxy of GaN based structures for electronic applications
  • Progress in Schottky diodes based on GaN
  • Progress in HEMTs based on nitride semiconductors
  • Progress in terahertz devices based on nitride semiconductors

List of invited speakers:

  • O. Ambacher (Fraunhofer Institut for Applied Solid State Physics), Energy efficient GaN based power amplifier mobile communication;
  • S. Arulkumaran (Nanyang Technological University), Ultra-high Speed Transport Properties in GaN Nano-Channel Transistors by Tensile Stress;
  • T. Egawa (Nagoya Institute of Technology), Perspectives of Epitaxial Growth of GaN-on-Si and Power Device Applications;
  • B. Feigelson (US Naval Research Laboratory), Advances in p-type doping of GaN by implantation as a result of novel annealing technique;
  • J. Freedsman (Nagoya Institute of Technology),  AlInN/AlGaN/Si metal-oxide-semiconductor heterostructure field-effect-transistor with normally-off operation and high breakdown;
  • D. B. Herrera (GPTech),Photovoltaic Power Inverter Design based on GaN switches Technologies;
  • O. Hilt (Ferdinand-Braun-Institut, Leibniz-Institut fuer Hoechstrequenztechnik), Static and dynamic properties of 600 V normally-off GaN switching-transistors;
  • C. Humphreys (University of Cambridge), Nitrides Growth on large-area silicon substrates for High-power Electronics at Low Cost;
  • H. Ishida (Panasonic Corporation), Normally-off GaN power transistors on Si substrates for high-frequency power switching applications;
  • J. Kaczmarski (Institute of Electron Technology), In-depth study of nanocrystalline Ru-Si-O as a Schottky electrode for nitride semiconductors;
  • W. Knap (University of Montpellier and CNRS, Institute of High Pressure Physics) GaN/AlGaN transistors and Schottky diodes for THz applications;
  • A. Koehler (US Naval Research Laboratory), Optimization of AlGaN/GaN HEMT Surface Passivation for Improved Dynamic ON-Resistance;
  • M. Kuzuhara (University of Fukui), Effect of passivation on breakdown and dynamic on-resistance in AlGaN/GaN HEMTs;
  • Y. Liu (Sun Yat-Sen University), E-mode trench gate GaN MOSFET fabricated by selective area growth on Si substrate;
  • K. Matsumoto (TAIYO NIPPON SANSO), Challenges to GaN MOCVD: High Growth rate and High Purity;
  • F. Medjdoub (IEMN-CNRS), GaN material for next generation high power high temperature devices;
  • T. Suemitsu (Tohoku University), Progress in device and process technology for GaN HEMTs;
  • A. Taube (Institute of Electron Technology), Development of AlGaN/GaN HEMTs on semi-insulating bulk GaN substrates for high frequency applications.
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Growth and Characterization I : Takashi Matsuoka
09:15
Authors : C.J. Humphreys(1), J. Griffiths(1), I. Guiney(1), D.J. Wallis(1), M. Kuball(2), M.J. Uren(2), P.A. Houston(3), I. Thayne(4)
Affiliations : (1)Department of Materials Science and Metallurgy, University of Cambridge, 27 Charles Babbage Rd, Cambridge CB3 0FS, UK (2) University of Bristol, HH Wills Physics Laboratory, Tyndall Ave, Bristol BS8 1TL, Avon, UK (3) University of Sheffield, Department of Electronic and Electrical Engineering, Sheffield S10 2TN, UK (4) University of Glasgow, James Watt South Building, Glasgow G12 8LT, UK

Resume : GaN/AlGaN electronic devices have a higher breakdown voltage and can work at higher frequencies and higher temperatures than diodes and transistors made from other materials. We are growing on 150mm (6-inch) silicon substrates to reduce the cost, so that our technology is easily transferable to industry. We have demonstrated the growth of a variety of device structures, for example HEMTs for power transistors and for RF transistors. Our HEMTs have a breakdown voltage of >1200V on 6’’ Si substrates with 650 µm thick wafers. Some key challenges with the growth will be presented.

G.1.1
09:45
Authors : Yang Liu
Affiliations : Sun Yat-Sen University

Resume : Trench gate structure is one of the main schemes for E-mode GaN MOSFETs, however it is still ineligible to industry requirement due to its Vth instability caused by traps charging at MOS interface. Besides the etching technique to form the trench structure, selective area growth (SAG) was proposed by our group to intend achieving damage-free trench with high quality MOS interface. Based on optimized SAG process, including the separation between 2DEG interface and regrown interface and the removal of Si-background doping, the access AlGaN/GaN region was perfectly regrown to reach the as-grown one level and an e-mode GaN trench gate MOSFET was fabricated successfully on Si substrate. In comparison with the dry-etch (ICP) trench gate MOSFET, the SAG MOSFET shows superior properties with negligible gate trapping effect, presenting an extremely small Vth hysteresis. The result indicates that the SAG is a practicable alternative technique towards stable GaN MOSFET for power switching applications. With regarding GaN growth on Si substrate, AlN/GaN superlattice buffer structure was adopted, in which the strain state was also investigated. First, we have observed the Raman strain specific spectrum for GaN E2H mode. Such observation can easily open the window for stain engineering in GaN on Si system. Secondly, based above observation, we have also researched the correlation between the strain induced by C doping and the C site in GaN lattice in high blocking-voltage GaN on Si system.

G.1.2
10:15
Authors : Y.Cordier (1), S.Rennesson (1), R.Comyn (1,2), E.Frayssinet (1)
Affiliations : (1) CRHEA-CNRS UPR10, rue Bernard Grégory, 06560 Valbonne, France (2) LN2-CNRS UMI-3463, Université de Sherbrooke, Sherbrooke J1K OA5, Québec, Canada

Resume : MBE has developed for almost two decades in the field of III-Nitride semiconductors. Despite a lower growth temperature is generally considered as a drawback for achieving good crystal quality, it enables a better control of the AlN nucleation layer on high resistivity Silicon substrate to obtain low RF propagation losses. Furthermore, promising results have been obtained with MOVPE layers regrown on MBE AlN-on-Si templates, proposing a change in paradigm for the industrialization of GaN on Silicon. Ammonia was used to grow high purity films with a low residual donor concentration necessary for HEMT application. Compared with nitrogen plasma MBE, the purity of ammonia-MBE grown films is an advantage as it doesn’t necessitate any compensation to obtain resistive the buffer layers. Combined with well controlled interfaces within heterostructures, this enables efficient high frequency power transistors such as the ones we have demonstrated at 40 GHz. Moreover, the recent optimizations we made lead to growth temperatures below 850°C for AlN. This is a promising trade-off for the integration of GaN HEMTs on already processed Silicon CMOS to avoid the contamination of CMOS lines. A reduced growth temperature limits the parasitic diffusion of impurities implanted in Silicon CMOS devices and permits to avoid the drift of the electrical properties. MBE is particularly interesting in this case since a temperature superior to 1000°C is necessary for the MOVPE growth of GaN and AlN.

G.1.3
10:30 Coffee break    
 
Growth and Characterization II : Lutz Kirste
11:00
Authors : Koh Matsumoto, Yuya Yamaoka, Akinori Ubukata, Tadanobu Arimura, Guanxi Piao, Yoshiki Yano, Hiroki Tokunaga, and Toshiya Tabuchi
Affiliations : TAIYO NIPPON SANSO

Resume : The vertical electron device has a superior efficiency over the silicon incumbent, due to a lower on-resistance under a high voltage operation. Challenge to GaN MOCVD is to produce epiwafers using high-growth rates, to reduce the time taken to grow the thick layers that are needed for a high breakdown voltage. In this talk, we detail the reactor’s capability to control carbon and silicon impurities, and dopant concentration, in the growth of a GaN p-n diode on a native substrate. The carrier concentration in the silicon-doped, n-type layer of this bipolar device must be controlled in the range 1015 cm-3 to 1016 cm-3, while the carbon concentration is maintained to no more than 1×1016 cm-3. We will explain a trade off between the growth rate and the carbon control. We will show the growth pressure is a good parameter to control carbon incorporation. By raising the growth pressure, we can partially mitigate the trade off of the carbon incorporation and the growth rate. At a growth rate of 2.3 μm/h under atmospheric pressure, the carbon concentration can be as low as 3.7×1015 cm-3. We conducted three epitaxial-growth runs of Si doped GaN by a production machine (TAIYO NIPPON SANSO, UR25k). The average of carrier density of all the wafers was 1.6 × 1016 cm-3. The standard deviation (1) of wafer-to-wafer carrier density for the whole runs was 5.9%.

G.2.1
11:30
Authors : Felix Kaess, Seiji Mita, Jinqiao Xie, Pramod Reddy, Andrew Klump, Luis H. Hernandez-Balderrama, Shun Washiyama, Alexander Franke, Ronny Kirste, Axel Hoffmann, Ramón Collazo, Zlatko Sitar
Affiliations : Department of Materials Science and Engineering, North Carolina State University, Raleigh, NC 27695, USA; Technical University Berlin, Solid State Physics Institute, Hardenbergstr. 36, 10623 Berlin, Germany; HexaTech, Inc., 991 Aviation Pkwy, Suite 800, Morrisville, NC 27560, USA

Resume : Carbon incorporation makes it difficult to realize a high-quality drift region for MOCVD GaN-based power Schottky diodes where high electron mobility at controllable low doping is desired, typically to carrier concentrations of less than 2E16 cm-3. In this study, low Si-doped GaN layers were grown using growth conditions that yielded a high Ga supersaturation in order to reduce the carbon impurities. Our thermodynamic Ga supersaturation model is able to accurately predict the concentration of C point defects. Even at a growth pressure of 20 Torr, the carbon level in the Si- doped layers to levels could be reduced below 1E16 cm-3 as determined by SIMS, while maintaining a growth rate of 1.25µm/h. The highest Hall mobility of 820 cm2/Vs was obtained for a carrier concentration of 5E16 cm-3 when using a V/III ratio of 4000. At carrier concentrations below this maximum, the Hall mobility was still measured to be 700 cm2/Vs, down to a carrier concentration of 1E16 cm-3. A sharp decrease in mobility (mobility collapse) was observed for carrier concentrations below 1E16cm-3. In order to further reduce the compensation level of free electrons to even lower values, above-bandgap illumination during growth was used for defect quasi-Fermi level control. To further elaborate on the dependence of free electron mobility on compensation, results on low dislocation, low carbon, high mobility GaN films grown on ammonothermal GaN substrates will be discussed.

G.2.2
11:45
Authors : Piotr Caban, Marek Wojcik, Jarosław Gaca, Mariusz Rudzinski, Wlodzimierz Strupinski
Affiliations : Institute of Electronic Materials Technology ul. Wolczynska 133, 01-919 Warszawa, Poland

Resume : Aluminium nitride is particularly interesting due to its unique properties such as a wide and direct band gap as well as high thermal conductivity. High quality AlN epitaxial layers are needed in UV-EDs or deep UV-PDs and can be used as a buffer layer in the deposition of HEMTs. The main goal of this work is to present the results of GaN growth on an AlN buffer layer. The deposition of AlN with a linear change of ammonia flux enables fast coalescence of the grown AlN epilayer and eliminates pits from the surface and prevents growth of nanocolumns. This solution allows one to deposit both thin AlN layers without pits and thick AlN without pits and cracks. GaN layers deposited on such AlN buffers were analyzed using atomic force microscopy (AFM) to investigate their morphological properties and high resolution X-ray diffraction (HRXRD) to study their structural properties. X-ray diffractometry allowed the determination of important structural parameters such as the correlation lengths of columnar crystallites. The etch pit density was examined by defect-selective etching of the GaN surface. The heterostructures of AlGaN/GaN HEMTs grown on AlN buffers enabled the investigation of the properties of 2DEG. It was observed that for AlN buffer layers with thickness below 0.5µm mobility decreases to 1400[cm2/Vs], whereas for thicker buffers it is in the 1900-2200 [cm2/Vs] range.

G.2.3
12:00
Authors : Keisuke Yamane,Tohoru Matsubara,Narihito Okada,Akihiro Wakahara,Kazuyuki Tadatomo
Affiliations : Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology;Graduate School of Science and Engineering, Yamaguchi University;Graduate School of Science and Engineering, Yamaguchi University;Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology;Graduate School of Science and Engineering, Yamaguchi University

Resume : High-quality freestanding GaN substrates are of significant importance for high-performance nitride-based devices. A number of researchers have investigated the origins of threading dislocations as well as techniques for suppressing them. However typical freestanding GaN substrates exhibit concave bowing and there are no reasonable models to explain the phenomenon of lattice bowing. In this paper, we propose a mechanism to explain the lattice bowing of freestanding GaN substrates based on structural analyses by XRD, CL and TEM. Samples analyzed in this work were typical HVPE-grown freestanding GaN substrates fabricated by thermal-stress induced separation. A radius of curvature and lattice constant of the top surface of freestanding GaN substrates were almost the same as those of the bottom surface. This was indicative of the complete relaxation of the GaN lattice, even though the substrate exhibited a curvature. We found from cross-sectional CL images that dislocations are present in a plane normal to the growth direction in addition to conventionally-known threading dislocations; these are referred to as the in-plane dislocations. The in-plane dislocation had a a-type Burgers vector (edge character), forming an extra-half plane under each dislocation line. We proposed a model that the substrate bowing is caused by such extra-half planes. The density of the in-plane dislocation was good agreement with a value derived from our models. From these results, we concluded that the extra-half planes related to the in-plane dislocations are primarily responsible for the phenomenon of lattice bowing.

G.2.4
12:30 Lunch break    
 
Devices and Characterization I : Colin Humphreys
14:00
Authors : Oliver Hilt, Eldad Bahat-Treidel, Joachim Würfl
Affiliations : Ferdinand-Braun-Institut, Leibniz-Institut für Höchstfrequenztechnik, Berlin, Germany

Resume : By implementing a p-type GaN gate, normally-off operation with 1 V threshold voltage has been realized for 70 mOhm / 600 V transistors. The developed and standardized processing technology was applied to GaN layers grown on SiC and Si substrates to allow a direct comparison of both, static and dynamic device parameters. The GaN-HFETs out-perform Si-based superjunction MOSFETs in terms of gate charge and switching energy and feature a low area-specific on-state resistance, also when considering the full chip area. Excellent material properties of the GaN/AlGaN epitaxial layers are needed for efficient high-voltage switching which is challenging in particular for GaN-on-Si wafers. Compensation doping of the buffer layers is mandatory for sufficient high-voltage isolation. Material impurities – on the other hand – generate dispersion effects that mitigate the transistor switching performance. The increased dynamic Ron-effect is studied for different high-voltage stressing times and for device temperatures up to 175 °C. The trade-off between breakdown strength and dispersion is studied for GaN-on-Si wafers from different vendors. The higher thermal impedance of the GaN-on-Si devices is reflected in a reduced maximum drain current for pulse lengths > 1 µs. However, no significant thermal effect was found for lower pulse powers as targeted for efficient power switching.

G.3.1
14:30
Authors : Hidetoshi Ishida, Satoshi Tamura, Yoshiharu Anda, Masahiro Ishida and Tetsuzo Ueda
Affiliations : Automotive & Industrial Systems Company, Panasonic Corporation

Resume : Energy conservation technologies for semiconductor devices have been required to realize a lower carbon society. Although much effort has been devoted to increase the conversion efficiency of electrical energy conversion systems using Si-based power semiconductor devices such as MOSFETs and IGBTs, the efficiency reaches the limitation determined by the material property of Si. Wide bandgap semiconductor materials such as GaN and SiC have been researched to overcome the limitation. In particular, GaN is a promising material for high power and high frequency switching devices due to its higher breakdown field and smaller gate capacitance. In this paper, normally-off GaN power devices on Si substrates consisted of AlGaN/GaN hetero structure and p-type nitride semiconductor, so-called Gate-Injection Transistors (GITs), and their application to an inverter system and high frequency DC/DC converters are demonstrated. The GITs achieve 10 times lower on-state resistance and RonQg than those of Si MOSFETs. A simple inverter circuit consisted of six GITs without flywheel diodes, in which reverse current can be flown through the channel of GITs, achieves the conversion efficiency of over 99 % mainly due to lower conduction loss. The gate length of GIT is reduced down to 0.5 um to achieve smaller RonQg of 19 mohm nC. The DC/DC converter consisted of the GITs with short gate length achieves the conversion efficiency of over 90 % at 1MHz. Moreover, the DC/DC converter IC in which high-side and low-side GITs are integrated in a chip achieves the conversion loss of 88% at 5MHz by suppressing parasitic inductance between high-side and low-side GITs.

G.3.2
15:00
Authors : A. Taube1,2, E. Kamińska1, A. Piotrowska1, M. Ekielski(1), M. Myśliwiec(1),(2), A. Szerling(1), R. Kruszka(1), W. Wojtasiak(3), M. Kozubal(1), J. Kaczmarski(1), M. Wzorek(1), M. Góralczyk(3), D. Kuchta(3), P. Prystawko(4),(5), M. Zając(6), R. Kucharski(6)
Affiliations : (1) Institute of Electron Technology, Warsaw, Poland (2) Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, Warsaw, Poland (3) Institute of Radioelectronics and Multimedia Technology, Warsaw University of Technology, Warsaw, Poland (4) Institute of High Pressure Physics, Polish Academy of Sciences, Warsaw, Poland (5) TopGaN Ltd. , Warsaw, Poland (6) Ammono S.A., Warsaw, Poland

Resume : AlGaN/GaN HEMTs are the devices of choice for high frequency and high power MMICs. Up to now, AlGaN/GaN HEMT structures were grown mainly on semi-insulating SiC substrates.Recently, ammonothermal growth of high quality, truly bulk semi-insulating gallium nitride with threading dislocation density as low as 1x104 cm-2 and negligible bowwas developed. These advantages may lead to superior reliability and radiation hardness, as well as higher yield and repeatability of the final devices. In this talk we will present recent advances in the fabrication of AlGaN/GaN HEMTs on semi-insulating Ammono-GaN substrates. Key technological steps will be discussed, in particular planar isolation using ion implantation and the fabrication of low resistivity regrown ohmic contacts to AlGaN/GaN HEMT structures on Ammono-GaN. By using optimized Al+ ion implantation parameters resistances of isolation region over 1×1014 Ω/□ were obtained and was thermally stable up to 600°C. The ohmic contacts formed on highly doped regrown graded InGaN:Si,/GaN:Sisubcontact layers yielded contact resistances typically in the range of 0.3-0.6 Ωmm. The DC electricalmeasurements of fabricated devices show high output current density of 1000 mA/mm, a 220 mS/mm transconductance and a low 4.4 Ω/mm on-state resistance. The RFmeasurements shows that for the devices with rectangular, 0.8 µm gate fmax and fmax were 30 GHz and 21 GHz. The insertion gain |S21| attains 0 dB for frequency of 22 GHz. We expect that the RF parameters can be further enhanced by applying optimized gate design and length. The research was supported by the National Centre for Research and Development PolHEMT Project, Contract Number PBS1/A3/9/2012.

G.3.3
15:30 Coffee break    
 
Devices and Characterization II : Koh Matsumoto
16:00
Authors : Farid Medjdoub
Affiliations : IEMN – CNRS, Institute of Electronic, Microelectronic and Nanotechnology Villeneuve d’ascq, France

Resume : With the emergence of novel high power applications such as the automotive market, the development of a new generation of power devices operating well above 1 kV with high efficiencies is needed. Alternatives to existing Silicon (Si) technology have to be found since Si power devices are thermally limited and show high specific on-resistance at those operating voltages. GaN’s wide band-gap semiconductor properties and the compatibility with silicon technology lead to high expectations in low-cost power electronics with breakthrough performance, especially for high voltage DC-DC converters. However, this technology still suffers from the limitation of the silicon substrate since the breakdown occurs when the electric field reaches the silicon for large gate to drain spacing. In order to overcome this limitation, we have developed a process in which the Si substrate is locally removed in the high electric field region. This allowed us to achieve state-of-the-art 3-terminal breakdown voltage GaN-on-Si transistors above 3000 V while delivering low specific on-resistance. These devices still shows lateral breakdown voltages well-above 2 kV at 600 K. An integrated thermal management is being implemented allowing to maintain the outstanding breakdown voltage properties. Besides, the emerging ultrathin barrier AlN/GaN novel heterostructures are extremely promising for high frequency applications, however, limited today in terms of drain bias operation and power-added-efficiency (PAE). We will describe the development of high RF output power density together with unprecedented PAE for the first time on a sub-10 nm ultrathin barrier AlN/GaN double heterostructure at 40 GHz. This is attributed to the control of device leakage current, material and processing quality and current collapse under high electric field in spite of the very close proximity of the surface charges and the 2DEG. In this presentation, an overview of the development of our technology for both high voltage and millimeter-wave applications will be depicted.

G.4.1
16:30
Authors : Wojciech Knap1,2, Grzegorz Cywinski2 , Dmytro B. But1, Nina Dyakonova1, Krzesimir Szkudlarek2, Ivan Yahniuk2
Affiliations : 1 Laboratoire Charles Coulomb, University of Montpellier and CNRS, Montpellier, France 2 Institute of High Pressure Physics, Polish Academy of Sciences, Warsaw, Poland

Resume : We present an overview of some recent results concerning THz detection related to plasma nonlinearities in nanometer field effect transistors [1-3]. The subjects were selected in a way to show physics related limitations and advantages rather than purely technological or engineering improvements. In particular, nonlinearity and dynamic range of these detectors are discussed and two different technologies GaN and GaAs are compared. First results of THz detection by GaN/AlGaN lateral Schottky diodes [4] will also be presented. The results will be discussed in a view of their applications for terahertz imagers [5]. REFERENCES [1] W. Knap and M. Dyakonov, in Handbook of Terahertz Technology edited by D. Saeedkia (Woodhead Publishing, Waterloo, Canada, 2013), pp. 121-155. [2] W. Knap, S. Rumyantsev, M. Vitiello, D. Coquillat, S. Blin, N. Dyakonova, M. Shur, F. Teppe, A. Tredicucci and T. Nagatsuma, Nanotechnology 24 (21), 214002-214002 (2013). [3] D. B. But, C. Drexler, M. V. Sakhno, N. Dyakonova, O. Drachenko, F. F. Sizov, A. Gutin, S. D. Ganichev and W. Knap, J. Appl. Phys. 115 (16), 164514 (2014) [4] G. Cywiński, K. Szkudlarek, P. Kruszewski, I. Yahniuk, S. Yatsunenko, G. Muzioł, M. Siekacz, C. Skierbiszewski, S. Rumyantsev, and W. Knap, Journal of Vacuum Science & Technology B 34, 02L118 (2016); [5] http://www.unipress.waw.pl/teragan/

G.4.2
17:00
Authors : Herrera, D. B.(1), Galvan, E.(1) and Rodríguez, S.(1)
Affiliations : (1) GPTech, Camino de los Descubrimientos, 17, Seville, SPAIN

Resume : Gallium Nitride (GaN) is an advanced semiconductor material, which represents a huge potential to enable innovations to power converters, including Solar Inverters. The deployment of this technology is the key for the challenges on energy efficiency and renewable energy. The main objective of this GaN-based PV power inverter is to be able to achieve higher voltage, lower leakage, reduce the power dissipation and total cost by reducing passive components size demonstrating high reliability and lifetime technology. Some challenges with the manufacturing capabilities have to be proved to obtain material quality, low cost and high handling. The proposed 10 kW inverter with 100 kHz switching frequency consists of use the new GaN technology using cascode topology that permit us a smaller and simpler driver system. Efficiency is improved by reducing on resistance, leakage current, driver loses and passive component loses. Cost reduction is gotten by simplifying gate driver and reducing the number and size of passive components. A higher power density is also shown. The PV inverter is verified by the GaN thermal design characteristics by PLECS Plexim simulation software and the electrical characteristics, the passive components definitions and the high frequency switching are simulated by PSCAD software. A test-bench prototype has been built to verify the high efficiency and switching frequency of the GaN-based power converter. Improvements in total efficiency and passive components cost reduction in innovative PV solar power DC/AC inverter has been demonstrated by laboratory test results. Finally, a summarized performance comparison of high voltage normally-off GaN FETs versus Silicon and Silicon Carbide based devices is presented.

G.4.3
17:30
Authors : Yong Tae Kim, Jung-Hee Lee
Affiliations : Semiconductor Materials & Devices Lab., Korea Institute of Science and Technology Seoul, Korea; School of Electronic Engineering, Kyungpook National University Daegu, Korea

Resume : High power and high speed GaN MOSFET devices are designed and fabricated. To reduce the dislocation density and release the stress during the epitaxial GaN growth, we have proposed the AlN/GaN multi layer as a buffer layer instead of the step graded AlGaN buffer layers. Biaxial stress analysis using Raman spectroscopy reveals that AlN thickness is optimized at 9nm and GaN thickness is 20nm. Relationship between number of stacks of AlN/GaN multi layer with the optimized thickness and the crystalline structure of GaN epi layer indicates that the crystal structure seems to be better at 3 stacks of multi buffer layer and 2 DEG properties of AlGaN/GaN heterostructure grown on the 3 stack multi buffer layers are better than the heterostructure grown on the conventional step graded AlGaN buffer layer. Through the optimization of field plate and process design parameters, 1600 V recessed gate GaN MOSFET is successfully produced and Ron is 6.72 mΩ.cm2. Threshold voltage is higher than 3V, which means that normally off GaN HEMT power device. High speed of HEMT dominantly depends on electron mobility which is 1620 cm2 /Vs. These results will be contributed to the practical applications of high power GaN HEMT devices for automobile or industry high power switching converter.

G.4.4
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Growth and Characterization III : Henryk Teisseyre
09:00
Authors : Boris N. Feigelson, Jordan D. Greenlee, Travis J. Anderson, Jennifer K. Hite, Karl D. Hobart, Fritz J. Kub
Affiliations : Boris N. Feigelson - US Naval Research Laboratory; Jordan D. Greenlee - National Research Council; Travis J. Anderson - US Naval Research Laboratory; Jennifer K. Hite - US Naval Research Laboratory; Karl D. Hobart - US Naval Research Laboratory; Fritz J. Kub - US Naval Research Laboratory

Resume : III-nitride materials have attracted a continuous interest due to their wide range of applications. Unfortunately, the ability to implant and activate dopants in III-nitride materials is not well understood, and it is a key technical impediment to true planar processing in the III-nitride material system. Recently we introduced a novel annealing technique coined Multicycle Rapid Thermal Annealing (MRTA), which allows to demonstrate electrical activation of Mg implanted in GaN. Development of the MRTA highlighted few key elements critical to the successful outcome of annealing. These elements include capping structure, implantation profile and regime, annealing environment, and a temperature profile. The temperature profile of the MRTA process consists of two separate, successive steps. Both steps are conducted at elevated nitrogen pressure of about 25 atm. First, the implanted GaN is annealed conventionally at temperatures at which GaN is stable on the order of 10’s of minutes. In the second step, the annealing temperature is repeatedly pulsed above 1200˚ C, accumulating the time during which GaN is exposed to these high temperatures. In this talk, we discuss recent advances in all critical elements of MRTA, as well as the development of a modified MRTA process. The new modified process named symmetrical multicycle rapid thermal annealing (SMRTA) consists of two conventional annealing steps 1 and 3, with the step 2 of rapid heating and cooling cycles in between. The improvement in crystal quality provided by SMRTA is a key step that allows realization of a p-i-n diode by Mg implantation in GaN, and opens an opportunity for a future development of Mg-implanted devices.

G.5.1
09:30
Authors : Mateusz Wośko, Bogdan Paszkiewicz, Tomasz Szymański, Regina Paszkiewicz
Affiliations : Faculty of Microsystem Electronics and Photonics, Wroclaw University of Science and Technology Stanisława Wyspiańskiego 27, 50-370 Wrocław POLAND

Resume : The technology of AlGaN/AlN/GaN heterostructures has reached advanced stage and becomes widely used in mass production of various HEMT (high electron mobility transistor) structures based semiconductor devices . Although, the impact of the growth scheme and process conditions on the electrical properties of heterostructures is fairly well described in the literature, there is still little publications concerning the topic of both the AlGaN/AlN/GaN heterostructures uniformity and yield. In this work we would like to extend the knowledge of controlling parameters describing the uniformity of heterostructures deposited by MOVPE technique by adjusting structure growth scheme. In scope of the production yield, two aspects play the key role. First, the reduction of production costs, which can be achieved by energy and chemical precursor savings (i.e. decreasing growth time or layer thickness). Second, improvement of structures uniformity by minimizing of uncontrollable processes (i.e. temperature fluctuations or heterogeneity of gaseous atmosphere) or by application of the heterostructures growth schemes, sensitivity of which can be decreased with respect to the mentioned factors. In our work we present how the GaN buffer thickness and AlGaN barrier layer thickness influences the electrical properties of the AlGaN/AlN/GaN heterostructures and the uniformity of different structures deposited on two inch sapphire substrates. The samples deposited in AIXTRON CCS 3x2'' system are characterized by SEM and PL techniques. Moreoverour own method is applied for contactless microwave measurements of 2DEG sheet resistance.

G.5.2
09:45
Authors : V. Prozheeva 1, F. Tuomisto 1, H. Li 2, S. Keller 2, U. K. Mishra 2
Affiliations : 1 Department of Applied Physics, Aalto University, P.O. Box 14100, FI-00076 AALTO, Finland; 2 Electrical and Computer Engineering Department, University of California, Santa Barbara, CA, USA

Resume : High electron mobility transistors (HEMTs) based on III-nitrides grant higher 2D electron gas (2DEG) densities due to polarization fields intrinsic to the wurtzite structure [1]. Unoptimized N-polar HEMTs suffer from large-signal dispersion and are sensitive to light due to donorlike traps within the device structure [2]. The negative impact of the traps can be mitigated by implementing an elaborate design combined with Si doping [3]. We present results obtained by positron annihilation spectroscopy in N-polar undoped and Si-doped S.I. GaN/AlGaN(:Si)/AlGaN/GaN HEMTs with graded backbarrier design where the valence band is below the Fermi level and superlattice structures with high Al content. The data show strong positron trapping at the bottom interface in the undoped sample. When the Si doping of the AlGaN layer is above 5e18 cm-3 the interface is no longer attractive to positrons. Consequently, the excess positive charge at the interface causing dispersion in undoped HEMTs is not due to donor-like traps, which would repel the positrons. On the contrary, the interface is attractive to extra holes. Our experiments on Ga-/N-polar heterostructures demonstrate positron trapping at different interfaces as predicted by theoretical modelling [4]. [1] L. Bjaalie et al., New J. Phys. 16 (2014). [2] S. Rajan et al., J. Appl. Phys. 102 (2007). [3] M. H. Wong et al., Semicond. Sci. Technol. 28 (2013). [4] I. Makkonen et al., Phys. Rev. B 82 (2010).

G.5.3
10:00
Authors : Yutaka Tokuda, Shougo Ueda, Kouta Takabayashi
Affiliations : Aichi Institute of Technology, 470-0392 Toyota, Japan

Resume : We have studied a variation of trap concentrations as a function of V/III ratios in Si-doped n-GaN grown by MOCVD on free standing n+-GaN substrate. The V/III ratios are varied in the range from 1700 to 4600 in the nitrogen-rich regime. The higher V/III ratios correspond to more nitrogen-rich growth conditions. As for carbon impurities, the lower V/III ratios are expected to lead to the higher carbon concentrations, confirmed by SIMS measurements. Electron traps are characterized by DLTS using bias pulses for fabricated Schottky diodes, while hole traps by MCTS using above-band-gap light pulses. Of traps observed, our study has focused on the Ec-0.59 eV electron trap and the Ev+0.86 eV hole trap, since these are the dominant electron and hole traps, respectively, in MOCVD n-GaN on n+-GaN [1]. The Ec-0.59 eV electron trap concentration increases with increasing V/III ratio, that is, more nitrogen-rich conditions. In contrast, the Ev+0.86 eV hole trap concentration decreases with increasing V/III ratio. It is found that the Ev+0.86 eV hole trap concentration shows a positive correlation to the carbon concentration. Based on these observations, we will discuss the origin of defects with the energy levels at Ec-0.59 eV and Ev+0.86 eV which might act as carrier trapping and non-radiative recombination centers in GaN-based devices. [1] Y. Tokuda, CS MANTECH, 19 (2014).

G.5.4
10:15
Authors : H. Matsuura(1,2), L. Sang(1), M. Sumiya(1), T. Yamaguchi(2), T. Honda(2)
Affiliations : (1)National Institute for Material Science (NIMS); (2)Kogakuin University

Resume : With the high breakdown voltage, large saturation velocity, high thermal stability, and high two-dimensional electron gas (2DEG) mobility at heterojunctions, GaN is one of the promising candidates in developing next-generation power electronic devices. To ultimate improve the performance of power devices, a high-quality GaN template is very important. In this paper, the buffer layer thickness and annealing conditions were optimized to improve the optical and electrical properties of GaN grown on sapphire substrate. For the standard deposition process of GaN on sapphire, a low-temperature GaN buffer layer (LT-GaN) was firstly deposited, followed by an annealing process to form three-dimensional islands, then GaN epilayers were grown at high temperatures firstly to realize the islands coalescence and then quasi two-dimensional growth. The thickness of the LT-GaN buffer and annealing conditions are important to reduce the dislocations and improve the mobilities. In our experiment, the sapphire substrates were firstly cleaning at 1000℃ for 20min in hydrogen ambient. Then a LT-GaN buffer was deposited at 490℃, followed by the annealing process from 490℃ to 1000℃. Then GaN epilayer was grown on 1000℃ for 30 min. The growth time of LT-GaN buffer was varied from 1 to 2min, and the annealing time was changed from 7 to 10 min to obtain the optimized conditions. The structural and electrical properties of the GaN epilayers were estimated from x-ray diffraction (XRD), photoluminescence (PL), and Hall-effect measurement. It was shown that, the full-width of half-maximum (FWHM) of XRD (002)-plane rocking curve was the lowest for the sample with the LT-GaN growth time of 1 min and annealing at 10 min. However, the PL intensities and were increased with increasing buffer thickness and annealing time. The highest mobility of GaN with ~160 cm2/Vs was obtained for the sample with 2-min buffer layer and 10-min annealing time. The above results indicated that a thicker buffer layer and longer annealing time will be helpful to improve the electrical properties of the GaN grown on sapphire.

G.5.5
10:30 Coffee break    
 
Devices and Characterization III : Anna Piotrowska
11:00
Authors : Takashi Egawa
Affiliations : Research Center for Nano-Devices and Advanced Materials Nagoya Institute of Technology

Resume : Recent developments in the heteroepitaxial growth and device characterisitics of AlGaN/GaN-based HEMTs on 200-mm silicon substrate are presented. GaN devices are excellent candidates for low-loss and high power switching applications because of its electronic properties. The advantage of utilizing Si as substrate is that it enables the growth of GaN on large diameter up to a size of 200 mm, which offers the opportunity for CMOS integration. The limiting factors for high quality GaN-on-Si are large lattice and thermal expansion-coefficient mismatches between GaN and Si, which leads to high dislocation densities, wafer bowing and crack formation. Therefore, it is imperative to grow high quality GaN-on-Si with minimum wafer bowing and without crack in order to improve the device perfomance [1]. The wafer bowing as a function of the total thickness of the epitaxial layer grown on 4-inch Si were studied. To obtain the high-breakdown voltage for GaN HEMTs on Si, the thick epitaxial layers are necessary. However, this leads to the increases in the wafer bowing and the tensile strain. Finally, this results in crack formation in the epitaxial layer when the critical thickness of GaN is exceeded. The bowing of SLS in the absence of GaN layer is high, but the bowing of the epitaxial layer can be reduced by growing the GaN layer. For instance, the bowing value of the 5.0-um-thick SLS on AlGaN/AlN ILs was 135 um. However, the bowing value can be decreased to 80 um by growing the 2.0-um-thick GaN and AlGaN barrier layers. These results indicate that the wafer bowing can be minimized by use of SLS and GaN because of counter-balance of thermal and lattice mismatches between SLS and GaN. In order to grow high quality GaN epitaxial layer, the AlN nucleation layer (NL) deposited on Si is important. The suface properties and vertical BV values as a function of AlN NL growth temperature for the samples consisting of AlN NL/Si, AlGaN IL/AlN NL/Si and SLS/AlGaN IL/AlN NL/Si were also studied. The structural and electrical characteristics confirm the AlN NL/Si greatly influence the vertical BV characteristics for GaN-on-Si [2]. The AlGaN/GaN heterostructures were grown on 8-inch Si by optimized growth conditions and by using SLS technique [3, 4]. The epi-wafer exhibited the mobility of 1750 cm2/vs, the sheet carrier density of 1x1013 cm-2 and the bowing value of 50 um. The normally-off devices were fabricated by using gate-recess and MOS technology. The devices exhibited a drain current maximum of 300 mA/mm, low leakage currents and breakdown voltage of 825 V, respectively. These results suggest the potential for normally-off devices on AlGaN/GaN heterostructures grown using SLS. REFERNCES [1] T. Egawa et al., IEEE IEDM Tech. Dig., pp. 613-616 (2012). [2] J.J. Freedsman et al., Phys. Status. Solidi A 213, 424 (2015). [3] D. Christy et al., Appl. Phys. Exp. 6, 026501-1 (2013). [4] J.J. Freedsman et al. Appl. Phys. Exp. 6, 026501-1 (2013)

G.6.1
11:30
Authors : Tetsuya Suemitsu
Affiliations : Tohoku University

Resume : GaN-based high electron mobility transistors (HEMTs) are promising devices both for high frequency and high power applications because of their high electron saturation velocity and high carrier concentration as well as the high critical breakdown field. In order to enhance the device performance, the device design and the process technology to realize the designed structure are important aspects as well as the material growth. Particularly in electron devices, the key parameters to determine the device performance such as the gate length, the gate-drain spacing, and so on, depend on the process technology. In this talk, two important technologies to improve the breakdown characteristics of HEMTs are presented. One is the slant field plate technique using multi-step SiCN dielectric film. The advantage of the slant field plates over the conventional parallel-plate gate-connected field plates is experimentally demonstrated for the first time by this approach. The advantage exists not only on the breakdown voltage but also on the RF characteristics. The other technology is the neutral beam etching which significantly reduces the plasma-induced damage on the etched surface. This result in the superior isolation breakdown voltage comparing to the conventional inductively-coupled-plasma (ICP) etching. These process technologies will be a great help on improving the power performance of HEMTs and other types of electron devices based on the GaN material system.

G.6.2
12:00
Authors : O. Ambacher, R. Quay, M. Mikulla
Affiliations : Fraunhofer Institut for Applied Solid State Physics (IAF) Tullastr. 72 79108 Freiburg Germany

Resume : Mobile communication is one of the most dynamic sectors of the German economy. Hardly any other industry has shorter innovation cycles with new products coming to market faster. Mobile communication has become the biggest driver of growth in the telecommunications market and is an important economic factor which increases the competitiveness of Germany. According to the industry association BITCOM the global turnover from mobile services will grow to 600 billion euros in 2015. Of these, the mobile data services, which, at 16%, have the highest growth rate, will account for about 150 billion euros. Fraunhofer has recently designed and demonstrated an integrated broadband low-noise amplifier circuit on the basis of high frequency transistors. The amplifier was realized with the help of the GaN semiconductor technology with a gate length of 0.25 µm. Using this GaN technology, it is now possible to realize a combination of unique properties (low noise figure, high bandwidth and high linearity), which conflict with each other in other semiconductor technologies. The innovative circuit design uses a two-stage feedback architecture and GaN-transistors in a cascade structure, which yields a high bandwidth of 0.5 to 3 GHz. This ensures that all current frequency bands used in mobile communication can be covered. Measurements show that the amplifier achieves a noise figure less than 1.5 dB and a high gain of 35 dB over the entire frequency range. Due to its technical performance of this low-noise amplifier enables mobile communication using a variety of mobile phone standards in wireless networks, such as LTE or WiFi. Particular attention was paid to the design of the power cells which are the basis of large power transistors with up to 36 mm gate width. A novel approach to model the large signals of the transistors, in which all physically relevant (in particular polarization-induced) effects are mapped, supports the design of power cells and amplifier modules with highest efficiency, bandwidth and linearity. The right choice of the number of gate fingers, their length and their distances in a power cell and the use of semiconductor resistors to decouple the cells from one another allows the processing of transistors which are characterized by an extremely low susceptibility to vibration. This is an indispensable prerequisite for a simple and cost-effective assembly of transistors in high-frequency packages. The most important result in the course of the developments is to limit the maximum current flow through the transistor itself. The team managed to incorporate a boundary in the transistor by appropriate epitaxial growth of the AlGaN/GaN heterostructure, so that further outer wirings are not necessary for this purpose. The result of this measure are robust transistors which survive even extreme electrical mismatches at an operating voltage of 50 V.

G.6.3
12:30 Lunch break    
 
Devices and Characterization IV : Oliver Ambacher
14:00
Authors : Andrew D. Koehler, Marko J. Tadjer, Travis J. Anderson, Neeraj Nepal, Boris N. Feigelson, Karl D. Hobart, Fritz J. Kub
Affiliations : U.S. Naval Research Laboratory

Resume : Performance and reliability of AlGaN/GaN high electron mobility transistors (HEMTs) is limited by charge trapping, particularly within the access region between the gate and drain. After a high voltage OFF-ON switching event, electrons trapped at the surface deplete the two-dimensional electron gas (2DEG), resulting in an increased dynamic ON-resistance, a key metric for power switching applications. Effective surface passivation is necessary for suppressing the dynamic ON-resistance. The impact of plasma enhanced CVD (PECVD) SiN, in-situ grown SiN, atomic layer epitaxy (ALE) AlN, and combinations of these passivation materials on the dynamic ON-resistance of AlGaN/GaN HEMTs is investigated. Conventionally, dual frequency 13.56 MHz/(100-360 kHz) PECVD SiN is implemented to provide control of the film stress and quality. However, ion bombardment during the low frequency step during PECVD deposition has been identified to generate lattice damage to the surface of the AlGaN barrier, degrading the 2DEG mobility. To provide effective passivation and mitigate mobility degradation, a bilayer PECVD SiN approach is developed and optimized with thin high frequency SiN interlayer followed by dual frequency film with low stress. In addition, in-situ SiN, grown at the same time as the AlGaN/GaN layers in the metal organic chemical vapor deposition (MOCVD) reactor, preserves and protects the AlGaN surface and also provides a barrier from low frequency plasma damage from addition PECVD SiN. Finally, thin (10 nm) AlN films are grown by ALE directly on the AlGaN barrier, with conditions optimized to minimize the number of ions that reach the surface and maximize the number of active atoms to maintain the 2DEG mobility and provide low dynamic ON-resistance.

G.7.1
14:30
Authors : Masaaki Kuzuhara, Joel. T. Asubar, and Hirokuni Tokuda
Affiliations : University of Fukui

Resume : This paper presents our recent progress in GaN-based high-electron-mobility transistors (HEMTs) developed for power electronics applications. The comprehensive study on AlGaN/GaN HEMTs fabricated on a free-standing GaN substrate shows that an extracted effective lateral breakdown field of 1 MV/cm is limited by premature breakdown originating from the insufficient structural and electrical quality of GaN buffer layers and GaN substrate. The effective lateral breakdown field is improved to 2 MV/cm by using a resistive GaN substrate achieved by heavy Fe doping. Various issues relevant to current collapse are also discussed in this paper, in which more pronounced reduction in current collapse is achieved by combining some of the different process schemes, including surface passivation and surface plasma treatment. The dominant factors to reduce the effect of current collapse will be described. Finally a novel 3-dimensional field plate (3DFP) in AlGaN/GaN HEMTs is introduced, and its possibility of realizing true collapse-free operation is described.

G.7.2
15:00
Authors : G. Greco1), F. Iucolano2), F. Roccaforte1).
Affiliations : 1) CNR-IMM, Strada VIII, n. 5 – Zona Industriale, 95121 Catania, Italy; 2) STMicroelectronics, Stradale Primosole 50, 95121 Catania, Italy

Resume : GaN and related materials are attracting a great interest in the field of high power and high frequency devices. In particular, the use of AlGaN/GaN heterostructures enables HEMTs fabrication, due to the 2DEG formation at the interface. However, in order to optimize the efficiency of power devices, the achievement of low specific contact resistances in Ohmic contacts represents one of current technological issues. In fact, the wide band gap of AlGaN makes difficult to obtain Ohmic with low specific contact resistance. Moreover, undoped AlGaN layers are typically used to limit the scattering phenomena and optimize the 2DEG mobility. In this work the role of the processing conditions (annealing temperature, atmosphere, recession, etc.) and of the heterostructures properties on the Ohmic contact behaviour has been investigated. A modified thermionic field emission (TFE) model has been proposed to take into account the presence of the 2DEG, i.e., considering the dependence of the specific contact resistance on the heterostructures parameters (AlGaN thickness and Al concentration)..The proposed model indicated that the typical variations of Al concentration, AlGaN thickness, and sheet carrier density (from wafer-to-wafer or within the same wafer), can be responsible for the variability often detected in the measurements of the specific contact resistance in AlGaN/GaN heterostructures. These findings highlight the importance of accurately monitor the source of GaN materials for a better understanding of the Ohmic contact formation on AlGaN/GaN heterostructures.

G.7.3
15:15
Authors : M. Guziewicz (1), R. Kruszka (1), K. Golaszewska (1), J. Dyczewski (2), K. Pagowska (1), M. Mysliwiec (1), A. Laszcz (1), A. Czerwinski (1)
Affiliations : 1) Institute of Electron Technology, Al. Lotnikow 32/46, 02-668 Warsaw, Poland; 2) Institute of Physics, Polish Academy of Sciences, Al. Lotników 32/46, 02-668 Warsaw, Poland

Resume : Industrial implementation of GaN is quickly rising due to the growth of GaN structures on Si substrates. The use of the full potential offered by GaN, especially in power devices, is currently dependent on the development of adequate systems of metallization. Problems with devices operating at high current densities refer both to the reliability of contact metallization, interconnections in the area of semiconductor structures, as well as to connections with electrical terminals for packaging. Prototypical high power systems apply Au or Pt in order to protect interconnections from oxidation. A new type of interconnections could be based on Cu due to higher electrical and thermal conductivity, and considerable lower material price than for Au. Proper metallization for power devices should ensure stable electrical resistivity below 5 micro-ohm-cm after long-term thermal and electrical stresses. Our work presents fabrication technology of Cu-based interconnections for high power AlGaN/GaN HEMT transistor and results of interconnections durability. Magnetron co-sputtering deposition method was applied to create Cu alloys with Ru, Hf, Nb, NbN additives, as well as adhesion layers of Ti, NbTiN and a metallic cap film. Interconnection reliability was evaluated on test structures, where Cu lines were protected by thin metallic or dielectric cap against oxidation. The investigations suggest that crystal structure of the Cu film is stabilized by small amount of Nb or NbN additive. Moreover, Cu oxidation risk is suppressed by thin Ni-based glassy films. The best result was observed for 50 nm thick SiN coating formed by ALD. Resistance of the Cu interconnection was intact after ageing in air at 250 C for few hundreds of hours.

G.7.4
15:30 Coffee break    
 
Devices and Characterization V : Takashi Egawa
16:00
Authors : Joseph .J. Freedsman, Makato Miyoshi, and Takashi Egawa
Affiliations : Research center for Nano Devices and Advanced Materials, Nagoya Institute of Technology

Resume : The AlInN/GaN heterostructure based devices has emerged as potential candidates for high power and high-frequency applications. Recently, devices fabricated using such heterostructures showed improvements in the drain current and radio-frequency characteristics [1-2]. Extended works for normally-off operation also showed high drain current [3]. The detrimental problem associated in using conventional AlInN/GaN heterostructure based field effect transistors (HFETs) is its poor breakdown voltage (BV) and is predicted due to the highly conductive GaN buffer layer and gate leakage [4]. On the other hand, a remarkable enhancement in BV was achieved in HFETs by substitution of conventional GaN channel by AlGaN channel [5]. The AlInN/AlGaN heterostructure based devices are expected to deliver high BV which is highly desirable for high-power applications and are yet to be reported. In this work, an attempt was made to grow AlInN/AlGaN heterostructure on Si substrate and the heterostructure was used to fabricate normally-off metal-oxide-semiconductor (MOS-HFETs). The Al0.85In0.15/Al0.05Ga0.95 heterostructure was grown on silicon by using metal-organic chemical vapor deposition (MOCVD). The barrier and channel layer thicknesses were 10 nm and 1 um, respectively. As grown AlInN/AlGaN showed rough surface morphology with root mean square (rms) roughness value of 0.9 nm. This surface roughness value is twice that of our AlGaN/GaN or AlInN/GaN based heterostructure. The Hall effect measurements for this heterostructure showed a high sheet carrier concentration of 3 x 10^13 cm^-2, and a sheet resistance of 2.3 kohm/sq, respectively. This accompanied a low mobility of 88 cm^2V^-1s^-1. A low mobility value is attributed to alloy disorder scattering and interface roughness scattering in AlInN/AlGaN heterostructure [6]. The MOS-HFETs were fabricated by using gate recess and 20 nm atomic layer deposited Al2O3 layer as gate oxide. Device fabrication and characterizations were according to ref. [3]. The MOS-HFETs exhibited good direct current (dc) characteristics and high off-state BV. The MOS-HFET shows low drain and gate leakage currents. A high positive threshold voltage (Vth) of 1.9 V extracted from the transfer characteristics ensured normally-Off operation. This Vth is compatible with the reported normally-off AlInN/GaN MOS-FETs [2]. The dc current-voltage characteristics shows a drain current maximum (IDS,max ) of 89 mA/mm and a specific-on resistance (Ron,sp) value of 22 mohm.cm^2 at a gate bias of 8 V. The product of carrier mobility and density (Ns x u) is low and therefore the drain current density is small. The partial depletion of the channel under the gate region further reduces the drain current and results in a high Ron,sp. This device with a gate-drain spacing of 20 um also showed remarkable off-state BV of 993 V. Further, the on-current and off-state BV can be modulated by varying the Al composition in barrier and channel layers respectively. These results of normally-off MOS-HFETs using AlInN/AlGaN/Si heterostructure are promising for future high power device applications. The challenges for AlInN/AlGaN/Si devices, BV as a function of Lgd, will be presented in detail. References: [1] J. J. Freedsman et al., Appl. Phys. Lett. 107, 103506 (2015). [2] S. Arulkumaran, et al., Jpn. J. Appl. Phys. 54, 04DF12 (2015). [3] J. J. Freedsman et al., Appl. Phys. Exp. 7, 104101 (2014). [4] J. Kuzmik et al., Phys. Stat. Solidi C, 6, S925 (2009). [5] T. Nanjo et al., Appl. Phys. Lett. 92, 263502 (2008). [6] M.Miyoshi et al., Appl. Phys. Exp. 8, 151003 (2015).

G.8.1
16:30
Authors : J. Kaczmarski(1), A. Taube(1),(2), T. Boll(3), M. Borysiewicz(1), M. Myśliwiec(1),(2), K. Piskorski(1), M. Wzorek(1), K. Stiller(3), E. Kamińska(1)
Affiliations : (1) Institute of Electron Technology, Al. Lotników 32/46, 02-668, Warsaw, Poland (2) Institute of Microlelectronics and Optoelectronics, Warsaw University of Technology, Koszykowa 75, 00-662 Warsaw, Poland (3) Department of Applied Physics, Chalmers University of Technology, Fysikgränd 3, SE-412 96 Gothenburg, Sweden

Resume : The Ru-based metallization has been considered as a reliable and thermally stable Schottky contacts for GaN-based power devices, due to its large work function andhigh melting temperature. Further improvement of Ru-based Schottky contacts can be obtained by using Ru-Si-O layers, which are conducting and characterized by amorphous microsctructure. These may lead to lowering of the leakage current by increasing Schottky barrier height, better thermal stability and resistance to corrosive atmosphere. In this work we present in-depth study of the application Ru-Si-O layer as a reliable, thermally stable Schottky contacts to AlGaN/GaN high electron mobility transistors. The Ru-Si-O barrier layers were deposited by reactive sputteringfrom Ru-Si target under variable oxygen content in the deposition plasma. The structuralproperties and chemical composition were characterized by means of x-ray diffraction, high-resolution transmission electron microscopy and atom probe tomography and revealed nanocrystalline Ru/Ru-O core/shell inclusions embedded in an amorphous Si-O matrix. The Ru-Si-O work function values asdetermined by internal photoemission spectroscopy, increased with increasing %O2 in deposition plasma from 5.65 eV for pure Ru-Si to 5.85 eV for Ru-Si-O deposited at %O2=30. The electrical properties of Ru-Si-O/AlGaN/GaN and Ru-Si-O/n-GaN Schottky contacts were investigated by measurements and analysis of current-voltage and capacitance voltage characteristics in temperature range from 25-200°C. Thermal stability of fabricated contacts was also studied. Finally, the impact of application of Ru-Si-O Schottky contacts on the electrical parameters of AlGaN/GaN high mobility transistors was examined. This work was partially funded by the European Union within European Regional Development Fund, through grant Innovative Economy (POIG.01.03.01-00-159/08, "InTechFun"), and from the Polish National Science Centre as part of PhD scholarship ETIUDA3, decision UMO-2015/16/T/ST7/00179, from the Swedish Institute as a part of Visby scholarship, and from the ITE fund, as part of PhD scholarship, decision 53.03.003.

G.8.2
17:00
Authors : S. Arulkumaran(1), G. I. Ng(2)
Affiliations : (1) Temasek Laboratories@NTU, Nanyang Technological University, Research Techno Plaza, Singapore 637553; (2) School of EEE, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798.

Resume : A nano-channel (NC) T-gate Fin-High-Electron-Mobility Transistor (Fin-HEMT) was fabricated with 170 nm gate-length on In0.17Al0.83N/GaN NC with effective width (Weff) of 200 nm. The device layer structure and a complete device process details can be found in Ref [1,2]. The lattice-matched In0.17Al0.83N/AlN/GaN HEMT structure was grown on Si(111) by MOCVD system with 2DEG charge density of 2.74×1013 cm-2, 2DEG mobility of 760 cm2/V·s, and sheet resistance of 300 Ω/sq. The fabricated InAlN/GaN NC Fin-HEMTs exhibited good pinch-off characteristics and a very high drain current density (ID) of >3500 mA/mm and a highest extrinsic transconductance (gm) of >1400 mS/mm at a drain voltage of VD= 6V. Since the source resistance (Rs) of the Fin-HEMT behaves similar to the Rs of Conv. HEMT, we do not expect any enhancement in ID or gm due to Rs [2]. However, the extracted electron velocity (ve~6×107 cm/s) supports the dramatic increase of ID and gm in the InAlN/GaN Fin-HEMTs. This could be the result of modification in the optical-phonon spectrum or scattering rates, possibly due to the 3D geometry or the effective mass being altered by the stress caused by lateral scaling (fin formation) and induced in-plane tensile stress by the PECVD deposited SiN films and T-shape gate. The increase of in-plane tensile stress component by SiN passivation in the formed NC was also confirmed by micro-PL and micro-Raman measurements [2]. In addition, the InAlN/GaN Fin-HEMTs also exhibited ultra-high speed transport properties even at low operating voltage (VD) of 0.5 V [1]. These results demonstrated that through stress engineering, InAlN/GaN nano-channel Fin-HEMTs are promising for next-generation ultra-high speed device applications. [1] S. Arulkumaran et al., IEDM Tech. Digest,Dec 2014, p. 594. [2] S. Arulkumaran et al., APL 106, Feb2015, p. 053502.

G.8.3

No abstract for this day

No abstract for this day


Symposium organizers
Henryk TEISSEYREInstitute of Physics | Polish Academy of Sciences

Al. Lotników 32/46 02-668 Warsaw Poland

+48 606 666 751
teiss@ifpan.edu.pl
Lutz KIRSTEFraunhofer Institute for Applied Solid State Physics

Tullastrasse 72, D-79108 Freiburg, Germany

Lutz.Kirste@iaf.fraunhofer.de
Michal BOCKOWSKIInstitute of High Pressure Physics, Polish Academy of Science

Sokolowska 29/37 Warsaw, Poland

bocian@unipress.waw.pl
Takashi MATSUOKAInstitute for Materials Research, Tohoku University

2-1-1, Katahira, Sendai-shi, Miyagi-ken, 980-8577, Japan

matsuoka@imr.tohoku.ac.jp