Materials for electronics and optoelectronic applicationsI
Integration of novel materials and devices on silicon for future technologies
Introduction and scope:
The symposium aims to gather scientists working on monolithic and heterogeneous integration to expand silicon technology. It is an evolution of a symposia series that attracted a large number of attendees over the years. This research field paves the way towards highly functionalized Si-based technologies that can address challenges in our societies.
Silicon remains the material of choice for manufacturing integrated circuit (IC), achieving an unbeaten level of system integration. Fundamental physical limits of Si present major obstacles for miniaturization (“More Moore”) and functionalization (“More than Moore”) of Si-based ICs. In parallel, new markets driven by societal needs – mobile & low power technologies, ultra-fast data communication, cognitive systems, application in life-sciences, new computing paradigms– will stem from technologies where the integration of alternative semiconductors and oxides on the mature Si technology platform will be a key differentiator. The symposium will be devoted to highlight novel breakthrough approaches that impact monolithic and heterogeneous integration on silicon baseline technology, either CMOS or integrated photonics. The scope includes fundamental materials understanding, using novel integration schemes, or targeting new fields of application. The focus will be on the fabrication and characterization of materials considered as non-standard for Si technology, such as strained SiGe and, (Si)GeSn(C) etc.; compound semiconductors (III-V, II-VI); oxides, nitrides; and two-dimensional materials (graphene, BN, MoS2). Contributions related to innovative hetero-integration techniques (advanced hetero epitaxy, wafer bonding, microstructure printing, self-assembly etc.) will be encouraged. Finally, a particular attention will be given to applications demanding an interdisciplinary approach. This symposium will have a strong focus on biomedical or environmental sensing enabled new device concepts (such as THz sensing and SERS with semiconductor plasmonics), and on materials innovation to address new computing paradigms such as quantum and neuromorphic computation. The productive interaction across disciplines, will help materials scientists to drive the exciting transition towards higher-value, highly functionalized Si microelectronics, supporting technology that can address today’s and tomorrow’s societal needs.
Tentative list of invited speakers:
- N. Curson (UCL, UK) “Nanolithography on semiconductor surfaces”
- L.M.K. Vandersypen (TU-Delft, NL) “Quantum computing with SiGe heterostructures”
- F. Vollmer (MPI Erlangen, DE) “Nanophotonics for biosensing”
- S. Zaima (Nagoya University, JP) “Materials issues fo GeSn technology“
- C. Spinella (CNR-IMM, IT) “High resolution transmission electron microscopy of IV group materials“
- D. Marris-Morini (UPSud, FR) “High-speed modulators based on SiGe QCSE”
- A. Seeds (UCL, UK) “Monolithic integration of quantum dot lasers on Silicon”
- H. Bhaskaran (Oxford, UK) “All-photonics memory based on PCM”
- F. Tyholdt (SINTEF, NO) "PiezoMEMS”
- G. Larrieu (Uni.Toulouse, LAAS-CNRS, FR) “Si nanowires Vertical FET devices ”
- G. Saint-Girons (Uni. Lyon, INL-CNRS, FR) “Functional oxides for Optical devices”
- J. Gómez Rivas (FOM Institute AMOLF, NL) "Semiconductor-based terahertz plasmonics”
- S. Chiussi (University of Vigo, ES) “UV Excimer Laser Assisted Heteroepitaxy of (Si)GeSn on Si“
- G. Niu (University of Xi'an, CN) "Germanium Island Nanostructures on Silicon Nanotips"
- Fabien Alibart (CNRS, FR) “Nanodevices for Cognitive Information Processing”
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Symposium Plenary : G. Capellini
Authors : Harish Bhaskaran
Affiliations : Department of Materials, University of Oxford, UK OX1 3PH
Resume : Phase change materials are active in both optical and electronic domains. Their optical change in reflectivity in response to optical pulses has been extensively used in rewritable optical disk data storage (CDs, DVDs and Blu-Ray Disks). However, only recently has our collaboration made an effort to miniaturize these properties onto a photonic circuit for on-chip all-photonic memories. Such a photonic memory is non-volatile, is multi-bit and can also result in applications beyond von Neumann computing in addition to reducing the bottleneck of data transfer between the processor and memory in conventional computers.
Authors : Frank Vollmer
Affiliations : Max Planck Institute for the Science of Light
Resume : Medicine as well as biology increasingly rely on the use of cutting‐edge engineering and physics, in order to pursue the next generation nanomedical applications and to address fundamental questions in the life sciences. Central to this task is the study of micro- and nano systems, focusing on how engineered systems combined with natural ones can advance sensing, medicine, and our understanding of how biological systems work. My research addresses these important questions with state‐of‐the‐art biosensor technologies, capable of detecting single molecules and their structural dynamics; and resolving the kinetics of complex molecular systems on timescales ranging from few nanoseconds to several hours. These studies provide novel insights into the dynamic biomolecular structure, the dynamic structure-function relationship, and enable the engineering of biomolecular properties for applications in nanomedicine and biosensing.
Authors : Fabien Alibart
Affiliations : IEMN-CNRS, Boulevard Poincarré, Villeneuve d'Ascq, France
Resume : One of the biggest challenge for future information and communication technologies would be to replicate the brain computing capacity to learn, adapt and evolve in a complex environment. The emergence of memristive devices is currently driving an increasing interest in neuromorphic computing to complement and to provide enhanced functionalities to existing CMOS/Von Neumann processors with the aim to realize low-power bio-mimetic hardware systems. Indeed, this technology appears as a realistic solution for the implementation of synaptic functions, one of the most critical component to be realized in such circuits. Two main streams are now driving research efforts: (i) from one hand, the quest for ultra high-density, low power and analog programmability memory devices would offer promising solution for artificial neural networks implementation. (ii) In the other hand, the bio-mimetic approach aims at replicating and implementing in emerging memory technologies synaptic features observed in biology that would revolutionize our way of building computing systems. In this talk, I will present how different memristive technologies can be used with respect to this two approaches and how innovative circuits can be built based on this elementary devices.
Materials for Opto- and Nanoelectronics I : tbd
Authors : Shigeaki Zaima, Osamu Nakatsuka, Masashi Kurosawa, Wakana Takeuchi, Mitsuo Sakashita
Affiliations : Institute of Materials and Systems for Sustainability, Nagoya University; Graduate School of Engineering, Nagoya University; Institute of Materials and Systems for Sustainability, Nagoya University; Graduate School of Engineering, Nagoya University; Graduate School of Engineering, Nagoya University
Resume : Germanium tin (GeSn) alloy and related semiconductor materials have much attracted attention in the recent years for nanoelectronic and optoelectronic applications [1-6]. GeSn-related semiconductors provide novel energy band engineering in silicon (Si) nanoelectronics because the energy bandgap can be controlled with the Sn content, and in addition, the indirect-direct transition can be realized in Ge(Sn) with a biaxial tensile strain as high as 1% or a substitutional Sn content higher than about 10%. Moreover, ternary alloy semiconductors such as germanium silicon tin (GeSiSn) effectively extends the application range since the energy band structure can be controlled independently on the lattice constant. Those enable us to engineer both energy band structure and lattice parameter like group-III-V compound semiconductors only with group-IV semiconductor materials, which provides fusion and integration technology of new functional devices into Si ultra large scale integrated circuits (ULSIs). There are many challenges in engineering materials properties for electronic and optoelectronic applications of GeSn and related semiconductors; (1) crystal growth, (2) energy band engineering, (3) control of crystallographic and electronic properties related to defects and dopants, (4) surface and interface engineering, and (5) strain engineering in nanostructures. During recent 10 years, we have been developing the thin film growth technology and interface engineering of GeSn-related materials and investigated the crystalline, electronic, and optoelectronic properties of them. In this talk, we will report our recent achievements and discuss challenges of GeSn technology for Si nanoelectronics. One of the most important subjects for the crystal growth of GeSn is the control of the segregation and precipitation of Sn atoms from matrix material because a substitutional Sn content is generally limited due to the low thermal equilibrium solid solubility of Sn in bulk Ge and Si . The low temperature growth is one of effective methods to enhance the Sn content with suppressing Sn precipitation . We also found that reducing the strain energy is effective to suppress the Sn precipitation and improve the crystalline quality of GeSn epitaxial layers . The reduction of lattice-mismatch of substrate to GeSn enables us its epitaxial growth with a substitutional Sn content as high as 27% . GeSn-related materials provide wide variety for energy band engineering. GeSn realizes the bandgap shrinkage to 0.25 eV with increasing a substitutional Sn content by 27% . Also, the indirect-direct crossover can be practically achieved with a Sn content over about 10%, which significantly enhances the photoluminescence and photon absorption properties of GeSn. Related group-IV materials of SiSn, SiGeSn, germanium tin carbon (GeSnC), and SiSnC are attractive and novel materials to extend the bandgap range widely [11-14]. Moreover, the type-I energy band alignment with lattice-matched GeSiSn/GeSn heterostructure is experimentally demonstrated, that promises appreciable energy band engineering with controlling lattice constants . Defect control in GeSn is an inevitable issue for practical electronic and optoelectronic applications . Vacancy related defects seriously influence on not only the concentration and mobility of carriers but also the luminescence property. Hydrogen surfactant mediated epitaxy improves on the crystalline properties of GeSn layers and reduce the density of shallow level defects . However, the control of deep level defects introduced in a low temperature growth of high Sn content GeSn is also a challenge for improving the photoluminescence efficiency . We have also challenged to engineer the metal/oxide/semiconductor (MOS) and metal/semiconductor (MS) interfaces for GeSn electronics [18-20]. The control of Sn behavior at MOS and MS interfaces in atomistic scale is a key to effectively reduce the interface state density. Recently, we demonstrated the reduction of Schottky barrier height at the metal/n-Ge interface by introducing a high Sn content GeSn interlayer . Also, understanding and design of local strain in GeSn/Ge nanostructure is necessary to control the electronic properties such as the energy band structure and carrier mobility for nanoelectronics . There are a lot of challenges for GeSn nanoelectronics in not only crystal growth technology but also electronic and optoelectronic engineering. The fundamental study of electronic states and the design of energy band structure of GeSn-related materials based on the crystalline materials science promises the establishment of GeSn technology for integrating Si ULSI platforms. This work was partly supported by Strategic Young Researcher Overseas Visits Program for Accelerating Brain Circulation, KAKENHI (Nos. 26220605, 26870261, and 15H03565), and Core-to-Core Program ICRC-ACP4ULSI from the JSPS and the ALCA Program from the JST in Japan. References 1. J. Kouvetakis et al., Annu. Rev. Mater. Res. 36, 497 (2006). 2. R. Soref, IEEE J. Select. Topics Quantum Electron. 12, 1678 (2006). 3. S. Takeuchi et al., ECS Trans. 33, 529 (2010). 4. O. Nakatsuka et al., Solid-State Electron. 83, 82 (2013). 5. S. Zaima et al., Sci. Technol. Adv. Mater. 16, 043502 (2015). 6. S. Wirths et al., Prog. Crystal Growth Character. Mater. 62, 1 (2016). 7. S. Takeuchi et al., Semicond. Sci. Tech. 22, S231 (2007). 8. Y. Shimura et al. Thin Solid Films 518, S2 (2010). 9. T. Asano et al., Thin Solid Films 557, 159 (2014). 10. M. Nakamura et al., Thin Solid Films 520, 3201 (2012). 11. M. Kurosawa et al., Appl. Phys. Lett. 106, 171908 (2015). 12. T. Yamaha et al., Appl. Phys. Lett. 108, 061909 (2016). 13. T. Yamaha et al., Jpn. J. Appl. Phys 54, 04DH08 (2015). 14. T. Yamaha et al., Jpn. J. Appl. Phys. 54, 08KA11 (2015). 15. W. Takeuchi et al., ECS J. Solid State Sci. Tech. 5, P3082 (2016). 16. T. Asano et al., Jpn. J. Appl. Phys 54, 04DH15 (2015). 17. O. Nakatsuka et al., Jpn. J. Appl. Phys. submitted. 18. C. Merckling et al., Appl. Phys. Lett. 98, 192110 (2011). 19. K. Kato et al., Jpn. J. Appl. Phys. 53, 08LD04 (2014). 20. A. Suzuki et al., Appl. Phys. Lett. 107, 212103 (2015). 21. S. Ike et al., Appl. Phys. Lett. 106, 182104 (2015).
Authors : A. Gassenq1, K. Guilloy1, S. Tardif1, N. Pauc1, M. Bertrand2, L. Millord2, F. Rieutord1, I. Duchemin1, Y-M. Niquet1, D. Rouchon2, J. Widiez2, J-M. Hartmann2, R. Geiger3, T. Zabel3, H. Sigg3, J. Faist4, A. Chelnokov2, V. Reboud2, V. Calvo1
Affiliations : 1 Université Grenoble Alpes, INAC, F-38000 Grenoble, France CEA, INAC-SP2M, F-38000 Grenoble, France 2 Université Grenoble Alpes, CEA-LETI Minatec, F-38054 Grenoble cedex, France 3 Laboratory for Micro- and Nanotechnology (LMN), Paul Scherrer Institut, CH-5232 Villigen, Switzerland 4 Institute for Quantum Electronic, ETH Zurich, CH-8093 Zurich, Switzerland
Resume : Silicon and germanium (Ge) are the dominant materials for electronic. However, the indirect bandgap prevents them from being used to realize efficient light-emitters. For Ge, adding strain can theoretically turn it into a direct bandgap emitting in the Mid Infra-Red (MIR) wavelength range (2 to 5µm). The interest of Si photonics for near infrared telecommunications is well established, new applications are now envisioned in the MIR. Therefore the use of strained Ge would open the way to CMOS compatible MIR active devices. In this work, we have studied suspended and integrated highly strained Ge microbridges. Very high strains up to 4.9% for uniaxial and 1.9% for biaxial stress were achieved thanks to 200-mm GeOI wafers. Photoluminescence and Xray Laue micro-diffraction studies have been performed as functions of the temperature. We have shown that (i) the strain can be tuned by the temperature when the bridges are suspended and that (ii) it stays constant when the bridges are landed to the Si substrate. A reduction of the L-Gamma energetic difference is demonstrated for the landed structures and a direct bandgap behaviour is evidenced for the suspended microbridges. Finally, the first steps of the direct integration of strained Ge microblocks on Si will be presented. This work shows the high potential of highly strained Ge for MIR active device integration. 1.Escalante, et al. Proc IEEE, 7305955-77(2015) 2.Roelkens et al. JSTQE-20-4(2014) 3.Süess et al. Photonics-446-7(2013) 4.Reboud et al. Proc.SPIE-975214(2016) 5.Gassenq et al. arXiv:1604.04391 6.Gassenq et al. Appl.Phys.Lett.-107-191904(2015). 7.Reboud et al, Proc.SPIE-936714(2015) 8.Tardif et al. arXiv:1603.06370 9.Geiger et al. arXiv:1603.03454
Authors : J. Elliott Ortmann, Nish Nookala, Shuhao Liu, Qian He, Agham Posadas, Albina Borisevich, Xuan Gao, Mikhail Belkin, Alexander Demkov
Affiliations : University of Texas at Austin, Department of Physics; University of Texas at Austin, Department of Electrical Engineering; Case Western Reserve, Department of Physics; Oak Ridge National Lab, Materials Science and Technology Division; University of Texas at Austin, Department of Physics; Oak Ridge National Lab, Materials Science and Technology Division; Case Western Reserve, Department of Physics; University of Texas at Austin, Department of Electrical Engineering; University of Texas at Austin, Department of Physics
Resume : With the recent advancements in oxide thin film fabrication, it is possible to design and grow oxide quantum well heterostructures whose well depths far exceed those of traditional GaAs-based quantum wells. Here, we discuss the design, fabrication, structural quality, and optical properties of MBE-grown SrTiO3/LaAlO3 multiple quantum wells. These oxide quantum wells have a conduction band offset of greater than 2eV, as measured by X-ray photoelectron spectroscopy. We demonstrate the excellent crystalline quality of these heterostructures via X-ray diffraction spectra, STEM-HAADF imaging and EELS mapping and present evidence of atomic-scale control of the structures. Furthermore, we present room-temperature FTIR spectra demonstrating the first-reported evidence of intersubband absorption in SrTiO3/LaAlO3 multiple quantum wells and discuss the possibility of integrating these heterostructures with Si substrates in order to fabricate integrated silicon/oxide quantum well-based photonic devices capable of operating in the near IR spectral region.
Authors : Kento Sato, Keisuke Yamane, Masaya Goto, Kenjiroh Takahashi, Hiroto Sekiguchi, Hiroshi Okada, Akihiro Wakahara
Affiliations : Toyohashi University of Technology; Toyohashi University of Technology; Toyohashi University of Technology; Toyohashi University of Technology;Toyohashi University of Technology; Electronics-Inspired interdisciplinary Research Institute, Toyohashi University of Technology; Toyohashi University of Technology
Resume : GaAsPN alloys are expected as new materials for Si-based tandem solar cells due to its perfect lattice matching to Si, satisfying the ideal bandgap energy of 1.7 eV. However, it is known that carrier concentration decreases with increasing N compositions in impurity-doped III-V-N. Hence, the doping control of III-V-N was generally performed on low N composition range (<2%). In this work, we succeeded both n- and p-type doping control of GaAsPN with high nitrogen composition (>5%), in which activation was assisted by rapid thermal annealing (RTA). Both n- and p-type GaAsPN alloys were grown by MBE, varying dopant cell temperature. S and Mg were used as n- and p-type dopants, respectively. As, P and N compositions were designed to be 19%, 76% and 5.3±0.3%, respectively, to obtain a bandgap energy of 1.7 eV by lattice-matched GaAsPN on Si. After the growth, RTA was performed at 920℃ for 1 min in nitrogen ambient. The carrier concentrations were controllable between mid 10E16 and 10E18 cm-2 by changing temperatures of dopant cells. These results were well consistent with the vapor pressure curve of each dopant source. While the activation ratios of both S and Mg in as-grown GaAsPN were quite low, they ranged from 20 to 30 % after the RTA process, which is comparable to that in GaP. Hall mobilities of n- and p- GaAsPN after RTA process were measured to be around 30 and 10 cm2/Vs, respectively. A p-i-n GaAsPN diode structure was grown on n-type GaP substrates. A current voltage characteristic shows typical rectifying curve with built-in voltage of 1.9 V. The leakage current of the device was less than 1 nA/cm2. From these results, both n- and p-type doping control of GaAsPN was successfully achieved.
Authors : Andrea Ballabio(1), Jacopo Frigerio(1), Stefano Sem(1), Daniel Chrastina(1), Giovanni Isella(1)
Affiliations : (1) L-NESS, Dipartimento di Fisica, Politecnico di Milano, Piazza Leonardo da Vinci 32, 20133 Milano, Italy
Resume : Germanium and SiGe heterostructures have been widely investigated for the integration on silicon of photonic devices. It has been demonstrated that the use of Ge/SiGe quantum wells (QWs) is suitable for the realization of detectors, working in a wide range of the infrared spectrum , and of optical modulators, exploiting the quantum-confined Stark effect to achieve intensity or phase modulation , even within a waveguide integrated platform . Most of these applications require symmetric multiple QWs structures, however more efficient phase modulation or non-linear effects could be obtained if more complex QW structures, such as asymmetric coupled QW or parabolic QW, could be available . Here we present the growth and the characterization of different QWs structures, in particular a multi parabolic QWs, and a multi asymmetric coupled QWs. The growth of samples has been performed in a low-energy plasma-enhanced CVD (LEPECVD), which guarantees an optimal control over the growth condition. The structures have been characterized by high-resolution X-ray diffraction (HR-XRD) and by photo-reflectance and transmission measurements, in order to investigate the optical behavior of the QWs. The measured optical properties are then compared with an eight-band k∙p model of the direct gap absorption.  Appl. Phys. Lett. 108, 091114 (2016)  Scientific Report 5, 15398 (2015)  Nature Photonic 8, 482–488 (2014)  Phys. Rev. B 44, 11315 (1991)
Material Analysis and Heterointegration : tbd
Authors : C. Spinella, A.M. Mio, G. Nicotra
Affiliations : IMM-CNR, Ottava Strada N. 5 Catania, Italy
Resume : Among the materials of Group IV, the silicon is still of great importance. However, the increasingly high miniaturization of electronic devices presents obstacles in the future use of silicon, mainly due to its physical limits. Moreover, the ever increasing ability to manipulate matter at the atomic scale is brought us the opportunity to better exploit the novel properties of materials on the nanoscale as those of the new 2D materials. Among these, graphitization of SiC, the heterogeneous integration of Ge on silicon, for example strained SiGe alloy, or other based Ge alloys, such as the GST in the field of phase change materials, open new opportunities for the integration of group IV materials in future miniaturized devices. Graphitization of SiC, is attracting particular research interest since it is a very promising way to produce uniform graphene films over large areas. In the case of epitaxial graphene (EG) grown on Si-polarized SiC, a crucial role is played by the presence of a so-called carbon “buffer layer”. Such monoatomic layer has been shown to present a certain degree of sp3 hybridization since it is partially bound to the outmost Si atoms of the SiC surface . The development of SiGe heterojunction bipolar transistors and strained Si/SiGe CMOS technology have promoted a large research effort aimed at controlling the growth of the SiGe layer and tailoring the desired material properties [2, 3] Phase-Change Materials (PCMs), mainly represented by (GeTe)x-(Sb2Te3)y (GST) alloys, are used for high-density data storage in optical media and for solid-state non volatile memory . Recently, it has been shown that multi-layered crystalline phase change memories, such as interfacial PCM (iPCM) can have improved functional properties [5, 6]. The high-ordered GST layers in the trigonal structure are characterized by the presence of van der Waals (vdW) gaps in between two planes of Te. Along the stacking sequence, for all the stoichiometries, different plane spacing are clearly distinguished. The spatial width of the vdW gap amounts to 2.7 Å, the planes adjacent to vdW gap are characterized by a spacing of 1.6 Å, while the next plane lies at a distance of 2.1 Å. This difference might be directly evaluated by STEM and associated to the strength of the bonds Te-Te (vdW gap) and Te-Ge/Sb In order to understand and control the properties of such as materials, we applied combined atomic resolution High Angular Annular Dark Field (HAADF) Scanning Transmission Electron Microscopy (STEM), atomic resolution electron energy loss spectroscopy (EELS) and energy dispersive x-ray spectroscopy (EDX). We prove how the combined use of modern transmission electron microscopy, entered into the era of sub-Å resolution, and high energy resolution and fast acquisition EELS/EDX spectroscopy, can be exploited to simultaneously estimate the crystal structure, band gap, and electronic density of the single crystal, or even a single layer, of the studied material at atomic level. 1. G Nicotra et al, ACS Nano 7 (4), (2013) p. 3045.2 2. Ieong M, Doris B, Kedzierski J, Rim K and Yang M 2004 Science 306 2057–2060 3. Lee M L, Fitzgerald E A, Bulsara M T, Currie M T and Lochtefeld A 2005 J. Appl. Phys. 97 011101 4. M. Wuttig, N. Yamada, Nat. Mater. 6 , 824 (2007). 5. J. Tominaga, R. Simpson, P. Fons and A.V. Kolobov, Appl. Phys. Lett. 99, 152105 (2011). 6. Tominaga et al., Sci. Technol. Adv. Mater. 16, 014402 (2015).
Authors : M. Billaud1,2, M. Martin1, Z. Chalupa2, M. Cassé2, C. Leroux2, H. Boutry2, T. Baron1
Affiliations : 1 Univ.Grenoble Alpes, LTM, F-38000 France CNRS, LTM, F-38000 Grenoble, France 2 Univ. Grenoble Alpes, F-38000 Grenoble, France CEA-LETI, MINATEC Campus, F-38054 Grenoble, France
Resume : III-V materials are promising candidates for n-MOSFET thanks to their high electron mobility. However the integration of III-V on 300mm Si substrate in an industrial environment is essential to show benefits over Si-CMOS. The epitaxy of III-V materials on Si and the quality of III-V/high-k interface are two main challenges to overcome to build high performance transistors. In the literature, interface quality is mainly studied with InGaAs samples grown on InP wafers. In this work, we present 300mm InGaAs MOSCAP on standard Si substrate elaborated in a 300mm Si CMOS platform. The In0.53Ga0.47As layer was grown by MOCVD on Si wafers without antiphase boundaries thanks to a thin GaAs/InP buffer. We demonstrate the electrical uniformity of InGaAs MOSCAP grown on 300mm wafer. The standard deviation of the maximum capacitance is less than 1%, showing the good quality of InGaAs epitaxy and dielectric atomic layer deposition. The C-V behavior and Dit value are similar to those measured on an equivalent MOSCAP structure grown on InP. We also compare the C-V characteristics of GaAs and InGaAs. Unlike InGaAs, GaAs MOSCAP shows high frequency dependence in accumulation, due to a high defect density and Fermi level pinning. In conclusion, this work illustrates the potential of III-V epitaxy by MOCVD on 300mm Si substrate for MOSFET application.
Authors : P. Torchia(1), L. Ansari(1), J. O’Brien(1), Duc. V. Dinh(1), J. O'Connell(2), J. Holmes(2), T. Trajkovic(3), V. Kilchytska(4), P. Gammon(5), and F. Gity(1)
Affiliations : (1) Tyndall National Institute, University College Cork, Lee Maltings, Dyke Parade, Cork, Ireland (2) Chemistry Department, University College Cork, Cork, Ireland (3) Cambridge Microelectronics Limited, Cambridge, United Kingdom (4) Universite Catholique de Louvain, Louvain-la-Neuve, Belgium (5) School of Engineering, University of Warwick, Coventry, CV4 7AL, United Kingdom
Resume : Silicon carbide is a wide bandgap material with high thermal conductivity, making this semiconductor a promising candidate for integration with Si for power electronic applications. There are several ways to epitaxially deposit Si on SiC; however, due to large lattice mismatch between the two materials, the resulting Si film will most likely be polycrystalline, containing a large density of dislocations originated from the SiC/Si interface. A new generation of power electronic devices is being developed through H2020 SaSHa project* for the benefit of space and terrestrial harsh-environment applications. Direct wafer bonding as an alternative method is being investigated for integrating crystalline Si to SiC using free radical exposure. SiC and Si wafers are exposed to a range of pre-treatments involving oxygen and hydrogen radical activation before in-situ wafer bonding under vacuum. Surface chemistry of the wafers is studied using X-ray photoelectron spectroscopy as a function of surface activation, and the bonded interface is characterised using transmission electron microscopy. The impact of remote plasma on the surface of the wafers is characterized by contact angle measurements and atomic force microscopy. The formation of voids at the bonded interface is observed using scanning acoustic microscope. The bonding energy is compared against predictions provided by atomic scale simulations as a function of different surface treatments. * http://sashaproject.eu/
Authors : Marie COSTE1, Timothée MOLIERE1, Geraldine HALLAIS1, Laetitia VINCENT1, Nicolay Cherkashin2, Daniel BOUCHIER1, Charles RENARD1
Affiliations : 1 : Institut d’Electronique Fondamentale, CNRS, Univ. Paris-Sud, Université Paris Saclay, Orsay F-91405, France ; 2 : CEMES-CNRS and Université de Toulouse, 29 rue de Marvig, 31055 Toulouse;
Resume : Since the last 30 years, GaAs integration on Si substrate had been a major challenge and was guided by applications in highly active areas such as silicon based microelectronics technologies or photovoltaic. GaAs integration on Si substrate without dislocation is difficult due to the 4% lattice mismatch between them and because of its polar/non polar nature GaAs/Si interface can generate defaults like anti-phase domains. In a previous work we have shown the possibility to integrate GaAs µ-crystal without dislocation and anti-phase domains by epitaxial lateral overgrowth from Si nano-opening. Nevertheless this integration technique leads to the systematic formation of twin on Si (001). The key point of the study presented here is germanium use as nano-seed to help the GaAs integration on Si substrate and avoid twin formation. Indeed Ge and GaAs lattice parameters and thermal expansion coefficients are pretty close and the initiation of the GaAs epitaxial growth from nanometric Ge seeds on Si allows minimizing stress. Thus when Ge fills completely opening and begins to wet silica, the twin formation should no more be favorable. Scanning Electron Microscopy (SEM), Transmission Electron Microscopy (TEM) and X-Rays Diffraction (XRD) analysis had been performed in order to characterize crystalline structure. These different results will be presented and discussed during the communication.
Authors : Xuanxiong Zhang, Hua Meng, Yuming Shen
Affiliations : Xuanxiong Zhang, Yuming Shen, School of Optical-Electrical and Computer Engineering, University of Shanghai for Science and Technology Hua Meng, School of Mechanical Engineering, Tongji University
Resume : Germanium, which has great application potential for the future CMOS technology for its high carrier mobility, has been considered to be a promising material structure in the microelectronics field. Ge thin layer transfer onto silicon substrate by ion implantation combined with wafer bonding named as Smart-cut technology has received a lot of attentions. The ultimate germanium layer transfer by Smart-cut invented is more suitable for device fabrication due to the low defect density compared to other methods like Ge condensation and liquid-phase expitaxy (LPE) growth. Smart-cut is such a popular approach that it has been used to achieve not only SOI (Silicon On Insulator) and GeOI (Germanium On Insulator), but also some other heterostructures. SOI of high quality and great size has been successfully manufactured by Smart-cut, but there are still lots of problems to be solved with GeOI fabrication. The study on the surface blistering during annealing after ion implantation is a primary for the layer transfer. But most of these works were related to silicon and there are only a few papers involved in the annealing blistering kinetics of Ge wafer implanted by hydrogen or/and helium. It is a prerequisite to have deep understanding of the evolution of H-platelets during annealing to achieve ideal layer transfer. In this report, we present the experimental results of Ge blistering kinetics in low temperature ranges for long annealing time by only hydrogen implantation. The Arrhenius plots with a break point were first illustrated and the activation energies in high and low temperature regions for each dose were acquired according to fitting calculation. The common phenomena that the turning direction of the kinetic straight-line based on H implantation doses in germanium is opposite to the current known materials are tentatively explained from the viewpoint of diverse Ge-H binding energies.
Materials for Opto- and Nanoelectronics II : tbd
Authors : Stefano Chiussi1, Stefan Stefanov1, Carmen Serra2, Alessandro Benedetti2, Jörg Schulze3, Dan Buca4
Affiliations : 1 Dpto. Física Aplicada, Univ. de Vigo, Rua Maxwell s/n, Campus Universitario, 36310 Vigo, Spain; 2 CACTI, Univ. de Vigo, Campus Universitario, 36310 Vigo, Spain; 3 Institut für Halbleitertechnik (IHT), Pfaffenwaldring 47, 70569 Stuttgart, Germany; 4 Peter Grünberg Institute 9 and JARA - FIT, Forschungszentrum - Jülich, 52425 Jülich, Germany;
Resume : Silicon-Germanium-Tin (Si)GeSn alloys present the challenging prospect to boost the development of new high speed micro- and nanolelectronic devices, as well as of CMOS compatible opto-electronic structures for Photonic Integrated Circuits (PICs). New Ge and GeSn strain platforms, as used in Si(Ge) technology, would therefore enable a wide field of applications, if lattice parameters can be tuned in a fast and cost efficient way. Essential drawback of these new Group IV alloys is the low solubility of Sn in Si and Ge. The use out-of-equilibrium techniques for its growth seem therefore to be beneficial, if a considerable Sn content without Sn clustering is desired. Heating-cooling cycles in the nanosecond time scale, as produced by Excimer Laser pulses, can be used to produce and control rapid melting-solidification processes, thus allow quenching of alloy compositions and structures that are usually not achievable through conventional processes. An overview on our results showing the formation of binary and ternary (Si)GeSn alloys with graded and with box-like concentration profiles using Pulsed Laser Induced Epitaxy (PLIE) with a commercial 193 nm ArF-Excimer Laser will be shown. Main effects of laser pulse energy density, number of pulses and laser treated heterostructure on composition and structure will be shown and discussed. On the other hand, for up-scaling PLIE to technologically relevant processes, both micro- or nanostructuring as well as large area processing should be desirable. Challenges for obtaining microstructures through mask projection units for 193 nm radiation or large areas through scanning techniques will therefore also be presented and discussed.
Authors : T. Baron1, R. Alcotte1,2, M. Martin1, R. Cipro1,2, T. Cerba1,2, J. Roque1,2, S. David1, F. Bassani1, J. Moeyaert1, F. Ducroquet3, Y. Bogumilowicz2, N. Rochat2, Nicolas Bernier2, E. Sanchez4, X.-Y. Bao4, J.B. Pin4
Affiliations : 1Univ. Grenoble Alpes, LTM, F-38000 Grenoble, France CNRS, LTM, F-38000 Grenoble, France 2Univ. Grenoble Alpes, F-38000 Grenoble, France CEA, LETI, MINATEC Campus, F-38054 Grenoble, France 3Univ. Grenoble Alpes, IMEP-LAHC, F-38000 Grenoble, France CNRS, IMEP-LAHC, F-38000 Grenoble, France 4Applied Materials, 3050 Bowers Avenue, Santa Clara, CA 95054, USA
Resume : The integration of III-V materials with high carrier mobility and direct band gap on silicon substrates is an important issue for future microelectronic, optoelectronic and photovoltaics devices. Two different approaches are currently developed. The first one is based on III-V layers transfer, previously grown on a III-V substrate, onto a Si substrate. The second one is the direct heteroepitaxy of III-V compounds on Si(100) wafers. However, the epitaxy of III-V materials on Si presents many difficulties mainly because of the large difference in lattice parameter and the polar/non-polar character of layer/substrate interface thereby generating numerous structural defects such as dislocations, stacking faults and antiphase boundaries (APBs) in the epitaxial layers. We will focus on our latest achievements in the growth and properties of III-As materials grown by metal organic chemical vapor deposition on 300 mm (100)-oriented Si substrates. We will show that the Si(100) surface preparation is a key point to get rid of APB in GaAs within a very thin layer of only 100 nm. This buffer layer is then used to grow (i) intrinsic or (ii) doped InGaAs alloys and (iii) quantum well heterostructures which present improved electronic and optic properties. As an example, electron mobility of 2000 cm2/V.s is obtained on n-GaAs with a doping level of 7x1017 cm-3, and the room temperature photoluminescence intensity is improved by a factor of 10 when no APB are presents. We will also present new development to decrease the dislocation density in the film.
Authors : Minhyeong Lee, Eunjung Ko, and D.-H. Ko
Affiliations : Department of Materials Science & Engineering, Yonsei University
Resume : Highly phosphorus doped epitaxial silicon films were grown on Si (100) substrates by using a reduced pressure chemical vapor deposition (RPCVD) system. In the highest phosphorus concentration 2.8E21 (atoms/cm-3), the tensile strain equivalent with 1.3 at. % substitutional carbon atoms was induced. In this study, we investigated on the effect of rapid thermal annealing (RTA) on fully strained P-doped Si films epitaxially grown on Si (100). The thermal treatment was conducted with rapid thermal processor (RTP) in a N2 ambient for 30s at temperature from 800℃ to 950℃. In order to characterize strain and lattice parameters of the layers, high resolution X-ray diffraction (HR-XRD) and reciprocal space mapping (RSM) were used. It was shown that as the temperature increases, no strain relaxation was confirmed and the diffraction peak of the thin films moved toward Si substrates, using HR-XRD and (224) RSM data. Additionally, relaxed lattice parameters of the films less than the lattice constant of Si were determined from RSM measurement and out-of-plane (a⊥) lattice parameters were also calculated. By investigating the impact of RTA on P-doped Si films, we demonstrate that the out-plane lattice parameters are reduced with increasing the annealing temperatures due to the phosphorus diffusion toward the Si substrate, while no strain relaxation occurs in the strained films.
Poster Session : G. Capellini, I. A. Fischer, J. Fompeyrine, C. Merckling
Authors : Adel Najar (1), Hakim Mehenni (2)
Affiliations : Department of Physics, UAE University Al-Ain, P.O.Box 15551 United Arab Emirates
Resume : Nanowires are an important class of one-dimensional (1D) nanomaterials that have been attracting a great deal of interest recently. Porous Silicon nanowires (PSiNWs) are one of the most important 1D semiconductors prepared by metal assisted chemical etching. In this paper we present the fabrication of PSiNWs doped with fluorescein-conjugated silane coupling agent (FiTC-APS) by immersion method. These nanostructures are characterized by TEM after fabrication. The PSiNWs doped FiTC-APS for different immersion time, are characterized by photoluminescence showing energy transfer from FiTC nanoparticles (521 nm) to PSiNWs (680 nm). The immersion time of 60 min present high-energy transfer compared to 10 and 80 min. The Raman measurements show a shift of the phonon peak towards lower wave number due to the porous structure and to change of porosity after immersion.
Authors : L. Augel (1), I. A. Fischer (1), A. Berrier (2), F. Hornung (2), M. Oehme (1), J. Schulze (1)
Affiliations : (1) Institute for Semiconductor Engineering, University of Stuttgart, Germany; (2) 1st Physics Institute, University of Stuttgart, Germany
Resume : The group-IV material GeSn opens up new possibilities for realizing photonic device concepts based on Si-compatible fabrication processes. Here, we present results of ellipsometric characterizations of highly p-type and n-type doped Ge0.95Sn0.05 films deposited on Si substrates for wavelengths between 1 and 16 um. We discuss the suitability of the investigated material for plasmonic applications at infrared wavelengths.
Authors : Ming WU, Johan MOULIN, Alain BOSSEBOEUF
Affiliations : Institut d?Electronique Fondamentale, Univ. Paris-Sud / CNRS / Université Paris-Saclay, 91405 Orsay Cedex, France
Resume : Vacuum packaging is required for resonant devices and microbolometers to ensure a high quality factor and a low heat loss respectively. Because of the small internal volume of wafer-level packages, and because of leaks, permeation and outgassing, it is difficult to pump down the residual gases inside the cavity. This can be overcome with the integration of non-evaporable getter films. Indeed, after thermal activation, these materials or alloys can adsorb the gases present in the cavity to maintain a low internal pressure (< 10-2 mbar) for a long period of time (several years or more). However, the getter must be thermally activated and this temperature should be lower than 300°C for 1h to avoid the deterioration of the packaged device. In order to increase the sorption capacity, porous and rough getters have been studied [1-3]. In this way, Li  deposited films with a glancing angle and found the larger the angle, the higher the porosity and specific surface area of the getter film. As a consequence, the exothermal reaction of the porous titanium film measured using DSC ranges from 291 to 394 °C. In our previous studies, thermal diffusion of titanium through an ultrathin capping gold layer has been studied as an alternative way to produce getter films at low temperature [4,5]. The results showed that Au/Ti film can be compatible with low temperature wafer-level vacuum packaging. In this work, we applied glancing angle deposition to increase the porosity of the titanium. Both titanium and gold films were evaporated to avoid rare gas contamination found in sputtered films which can outgas afterwards. Titanium films of 200 nm were evaporated on Si (100) with varying glancing angle (0°, 30°, 50°, 70°) then a 10 nm gold Au film was deposited without angle. The vacuum (5 × 10-8 Torr) was not broken in between. After deposition, the films have been annealed in a furnace in vacuum (< 1 mbar) at different temperature for 1 hour, leading to its oxidization due to the presence of traces of oxidizing species. The oxygen sorption capacity of films was studied as a function of the annealing temperature from four probe resistivity measurements, SEM observations and Energy Dispersive X-Ray spectrometry (EDX). All results are consistent and support that the gold avoids the contamination of the titanium layer for glancing angles of 0°, 30° and 50°. In addition, the oxygen sorption capacity is largely increased for Au10nm/Ti200nm with titanium deposited at 50° compared to samples deposited at 0 and 30°. The density of the sample was estimated by measuring the volume and the weight and the results show that the porosity of the titanium layer increases by 22 % and 57 % for deposition at 50° and 70° respectively, compared to deposition at 0°. The results are consistent with the ones of Li : porous films with a columnar structure can grow at a high glancing angle thanks to a high shadowing effect and a low lateral diffusion of adatoms on the substrate. The protection of this layer from oxidation has been characterized with EDX measurements : after deposition, there is no contamination in oxygen for glancing angles of 0, 30 and 50°. However, 48% of oxygen has been measured in the sample with titanium deposited at 70% thus the protection of the titanium against oxidation is not effective for such a high glancing angle. After annealing at 300 °C during 1 hour under vacuum, EDX measurement shows that the content in oxygen increases to 30 % for the sample deposited with an angle of 50° but remains lower than 8 % for angles of 0° and 30°. Thus the porosity of the titanium can largely increase the oxygen sorption capacity provided that the gold layer can protect it before annealing. As a complementary result, after annealing at 300 °C for 1 h the electrical sheet resistance increases by 90 % for an angle of 50°compared to 20 % and 22 % for angles of 0° and 30° respectively. These variations are due to the formation of titanium oxide after diffusion of the titanium through the gold layer. Analysis of the cross-section and the surface of these samples by SEM shows that the structure of titanium is columnar before annealing for deposition at 50° and 70° and the results are consistent with the porosity measurements. After annealing at 300 °C-1h, the surface of the sample with titanium deposited at 50° is no longer uniform: titanium oxide flakes (dark features in BSE image) and gold dots (white features in BSE image) are observed. This is attributed to the diffusion of titanium through gold preferentially along the grain boundaries. After annealing at 350 °C-1h, the gold layer is buried under a continuous TiOx layer and the titanium columnar structure is not observable. In addition, the gold layer is no more continuous and EDX measurements show that the concentration of titanium and oxygen are close to 65 % and 30 % respectively, what could be associated to an in-depth oxidation below the gold layer. Finally, we estimated the sorption of oxygen capacity from these results: 1.6 × 10-6 moles / cm2 of oxygen have been adsorbed after annealing at 300 °C-1h in the sample with titanium deposited at 50°, compared to 3 × 10-8 moles / cm2 of oxygen adsorbed in Au/Ti samples deposited without glancing angle . As a conclusion, the oxygen sorption capacity of Au/Ti bilayered films can be largely increased with porous titanium provided that the gold layer can protect it from oxidation before activation, what can be obtained by deposition of titanium with a glancing angle of 50° and deposition of the gold without glancing angle. After annealing, the gold layer is no more continuous and the porous titanium is oxidized in the bulk, what correspond of a sorption capacity in oxygen multiplied by 80 compared to the same structure with dense titanium.  E. Giorgi, B. Ferrario and C. Boffito, High-porosity coated getter, Journal of Vacuum Science & Technology A 7, 218, 1989.  B. Ferrario, A. Figini, M. Borghi, A new generation of porous non-evaporable getters, Vacuum 35, 13, 1985.  Chien-Cheng Li, Jow-Lay Huang, Ran-Jin Lin, Ding-Fwu Lii and Chia-Hao Chen, Performance characterization of nonevaporable porous Ti getter films, Journal of Vacuum Science & Technology A 25, 1373, 2007.  M. Wu, J. Moulin, S. Lani, G. Hallais, C. Renard, A. Bosseboeuf, Low temperature activation of Au/Ti getter film for application to wafer-level vacuum packaging, Japanese Journal of Applied Physics, vol. 54, p. 030220, 6 pages, 2015.  M. Wu, J. Moulin, G. Agnus, A. Bosseboeuf, Low activation temperature Au/Ti getter films for wafer-level vacuum packaging, ECS Transactions, 64(5) 297-304, 10/2014.
Authors : Hyunchul Jang, Byongju Kim, Sangmo Koo, and Dae-Hong Ko
Affiliations : Department of Materials Science and Engineering, Yonsei University, Seoul 120-749, Korea
Resume : Recently, strain relaxation behavior of SiGe epitaxial films has been investigated for application of the strain relaxation buffer (SRB) layer which decrease the misfit between high mobility channel material and Si substrate. We studied the strain relaxation behaviors of SiGe epitaxial films which were grown in difference growth condition such as source gas flow rate, growth temperature, and growth time. During the epitaxial growth of SiGe layer on Si substrate, the epitaxial film was applied compressive stress by the misfit difference between SiGe and Si. The compressive strain of SiGe epitaxial films were relaxed when the compressive stress exceed the elastic range called as critical thickness. The strain relaxation behaviors of SiGe layers under different growth conditions were changed. We deposited the Si1-xGex epitaxial layers in various process condition of ultra-high vacuum chemical vapor deposition (UHV-CVD) and analyzed the structure and strain behavior of the epitaxial layers using high-resolution transmission electron microscopy (HR-TEM) and high-resolution X-ray diffraction (HR-XRD). Finally, we confirmed that the strain relaxation mechanism of Si1-xGex epi-layers on Si was changed by Ge concentration and growth temperature.
Authors : J. H. Kim 1, D. S. Byun 1, D. H. Ko 1, J. H. Park 2
Affiliations : 1. Department of Materials Science and Engineering, Yonsei University, Seoul 120-749, Republic of Korea 2. Process Development team, semiconductor R&D Division, Samsung Electronics Co., Ltd San#21, Banwol-Dong, Hwasung-City, Kyungki-Do, 445-701, Korea
Resume : Recently, Phase change memory has been the focus of next-generation memories because of several advantages such as low fabrication cost, non-volatility, and its commercial scalability for sub 20-nm cell designs. However, previous studies have found that Ge2Sb2Te5, which is the material currently used, has several disadvantages such as low crystallization temperature, long crystallization time, high power consumption, and especially, environmental problem and low reliability of operation which is caused by incorporated Te. In this study, we investigated the properties of GexSb1-x, which exclude Te, on the surface morphology, electrical properties, crystal structures, and thermal stability of GexSb1-x, which is known to have a fast operating speed. Both the crystalline and the amorphous sheet resistance increase with increased Ge concentration. X-ray diffraction patterns showed that GeSb films of low Ge concentration, crystallize into a hexagonal phase. However, when the Ge concentration increases, phase separation was observed. In addition, the grain size and surface roughness decreases continually with increased Ge concentration. As the Ge concentration increased, the crystallization temperature and thermal stability of the amorphous state increased. The high operation speed and low operation voltage were achieved in low Ge concentration films. In comparison, the programming window increased with the increase of the Ge concentration.
Authors : Yong Tae Kim, Young Min John, Minho Choi, Heechae Choi, Seungchul Kim, Jinho Ahn
Affiliations : Semiconductor Materials and Device Laboratory, Korea Institute of Science and Technology, Seoul 02792, Korea; Sensor System Research Center, Korea Institute of Science and Technology, Seoul, Korea; Department of Materials Science and Engineering, Hanyang University, Seoul 04763, Korea; Center for Computational Science Korea Institute of Science and Technology, , Seoul 02792, Korea.
Resume : Phase-change materials (PCMs), which reversibly change a phase to another one by control of electrical pulse, is expected to apply to neuromorphic system and multi bit memory for IoT with high speed, long retention, and low power consumption. Many PCMs, including Te-based chalcogenide, have been intensively studied, but conventional Te-based chalcogenide lacks of multi level switching performances for the synaptic neural network and future multi bit non-volatile memory. Doping method makes intrinsic PCMs more attractive. Bi doping in In3SbTe2 (BIST) alloy has the multi-level transition temperatures, the lower activation energy, the freedom in the atomic structure with high concentration of vacancy. Transition temperatures shift lower than those of conventional IST. Activation energies also are reduced by Bi doping. We investigated the relationship among the fast phase transition, multi-synaptic signals for neuromorphic system and multi-bit memory. To measure the spike-timing dependent plasticity (STDP) characteristics, we determined that the depression and potentiation process are connected to the set operation and reset operation, respectively, not the other way around. That is because the potentiation is not a spontaneous process with time, and the cell not operated by pulse should be maintained as an unchanged state. The amorphous state has higher energy than crystalline state in the system and changes to crystalline state long after, and for this reason, crystalline state should be depression. From this method, we demonstrate the results with the operation of long-term potentiation (LTP) and long-term depression (LTD) with STDP rule.
Authors : Youngsin Park, Seung W. Lee, Yongcheol Jo, Hyunsik Im
Affiliations : School of Natural Science, Ulsan National Institute of Science and Technology (UNIST), Ulsan 44919, Korea; Division of Physics and Semiconductor Science, Dongguk University, Seoul 04620, Korea
Resume : Many body effects can result in modifications to the optical and electronic properties of two dimensional (2D) systems. Due to its unique layer-number dependent electronic band structure and strong excitonic features, atomically thin MoS2 is an ideal 2D system where photoexcited-carrier-induced many body effects can be detected in excitonic luminescence. The crystalline MoS2 is composed of vertically-stacked and weakly-interacting layers tied together by van der Waals interactions. Mono-layer (1L) MoS2 is a direct gap semiconductor with a bandgap of 1.8 - 1.9 eV, whereas bulk MoS2 is an indirect semiconductor with a band gap of ~1.2 eV. In this study, we prepared the 1L- and bilayer (2L) MoS2 flakes on a Si substrate covered with 285 nm-thick-SiO2 by mechanically exfoliating a bulk 2H-MoS2 crystal. We performed micro-photoluminescence (PL) measurements and demonstrated electron-lattice and electron-electron interaction induced bandgap shrinkage. At 4.2 K, the PL peak redshifts nonlinearly but grows linearly in intensity as the excitation power is increased. The redshift is due to optically-induced many-body effects leading to a renormalization of the fundamental bandgap. The excited carrier-induced optical bandgap shrinkage is found to be proportional to n4/3, where n is optically-induced excited carrier density in the conduction band. The large exponent value of 4/3 is explicitly distinguished from a typical value of 1/3 in various semiconductor quantum well systems.
Authors : Subhrangshu Choudhury, Mallar Ray , Subrata Chatterjee and Shyamal kumar Saha
Affiliations : Dr. M. N. Dastur School of Materials Science and Engineering,Indian Institute of Engineering Science and Technology,Howrah,India;Dr. M. N. Dastur School of Materials Science and Engineering,Indian Institute of Engineering Science and Technology,Howrah,India;Dr. M. N. Dastur School of Materials Science and Engineering,Indian Institute of Engineering Science and Technology,Howrah,India;Department of Materials Science,Indian Association for the Cultivation of Science,Kolkata,India.
Resume : Silicon, an indirect bandgap semiconductor is one of the most important and intensively studied materials despite being an inefficient light emitter. Si with nano scale dimensions can be coaxed to emit visible light with relatively high efficiencies. Understanding the luminescence process in Si nanocrystals (NCs) has remained challenging. We have synthesised Si nano structures via an inexpensive technique of mechanical milling followed by deliberate oxidation-etching-oxidation. We subsequently successfully encapsulated these luminescent Si NCs inside a solid block of polystyrene. Structural and optical investigations reveal that polystyrene encapsulates and protects the Si NCs. Distinct peaks corresponding to Braggs reflection of (111), (220), and (440) of Si crystals are seen in the X-ray diffraction profile. Bright field Transmission Electron Microscopy (TEM) images showed some dark spots and fringes which are signatures of Si NCs. From the optical characteristics it is seen that the Uv-visible absorption commences from 410 nm with a peak at 290 nm. Photoluminescence spectra of the nanocomposite shows highest intensity of emission at ~ 420nm.Thin film of polystyrene encapsulated Si NCs was spin coated on a Transparent conducting oxide (TCO) sandwiched between a Electron Transport Layer (ETL) of Alq3 and Hole Transport Layer (HTL) of PEDOT.PSS. Ohmic contacts were established to form a device which emits room temperature electroluminescence detectable with unaided eye.
Authors : Amir Hossein Karami, Nima Sefidmooye Azar, Mohammadreza Kolahdouz*, Hossein Aghababa, M. Bashirpour, Matin Forouzmehr
Affiliations : ECE Department, School of Electrical and Computer Engineering University of Tehran, Tehran, Iran Email: Kolahdouz@ut.ac.ir
Resume : Composite materials based on intrinsically insulating polymers and conductive fillers have interesting properties and have been under focus recently. One of these amazing properties is the ability nanoparticles in the polymer to move, align and finally form a conductive path through these particles under influence of electric or magnetic field. This happens because of a physical phenomenon named dielectrophoresis. This experience could lead to design and manufacture integrated circuits with floating interconnects which means that there will be no need to have several metallization layer anymore. According to our simulations, the mechanism of current flow through this conductive bridge made of conductive nanoparticles is tunneling because there is a thin layer of insulating polymer between every two particles. In this study, we investigate and show this property of conductive polymer metal composites theoretically and experimentally. In order to fabricate these devices, metal particles in an insulating polymer have been prepared. Polidimetilsiloxane (PDMS) has been used as the insulating polymer and silver and nickel particles were employed as the conductive fillers in separate experiments with 1.5% volume fraction. By sonicating the composite, conductive fillers dispersed uniformly in the polymer. Composite was drop-casted between pre-manufactured electrodes and AC/DC voltage was applied on them. We have shown how resistivity changes with time and the effect of using different nanoparticles has been investigated. A multi-switch system was presented in this study as well. It has also theoretically shown how size and distance of nanoparticles affect the IV characteristics of the manufactured switches.
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Heterointegration and Optoelectronic Devices I : tbd
Authors : Alwyn SEEDS, Siming CHEN, Jiang WU, Mingchu TANG, Mengya LIAO, Huiyun LIU
Affiliations : Department of Electronic and Electrical Engineering, University College London, Torrington Place, London, WC1E 7JE, England
Resume : Although silicon photonics technology has demonstrated high performance optical modulators and detectors, efficient electrically pumped optical sources have remained a challenge. To date the most successful approach has been wafer bonding of compound semiconductor gain sections to silicon waveguides. Direct epitaxial growth of compound semiconductor materials on silicon has been frustrated by material lattice mismatch and incompatible thermal expansion coefficients between III–V materials and silicon leading to high-density threading dislocations. Quantum dot (QD) laser gain regions have proved to be less sensitive to defects than conventional bulk materials and quantum well structures, due to carrier localization and hence a reduced interaction with the defects. In our work, we have combined QD gain regions with the use of super-lattice defect filter layers to enable the direct epitaxial growth of telecommunications wavelength lasers on silicon substrates. Broad area lasers were fabricated by optical lithography with as-cleaved facets . The measured room temperature threshold current density was 62.5 A cm-2, very similar to the best values for lasers grown on native substrates. Optical output powers as high as 105 mW were measured for a current density of 650 A cm-2. Lasing was obtained for substrate temperatures as high as 120 °C. An ageing test was carried out at 26 °C and 1.75 times threshold current for 3,100 hours, during which the output power reduced by 27.9% (26.4% in the first 500 hours). The extrapolated time to failure, defined as a doubling of threshold current, was 100,158 hours. 1. S. Chen et al., Nature Photonics doi:10.1038/nphoton.2016.21 (2016)
Authors : Kazuaki Tsuchiyama1, Keisuke Yamane1, Shu Utsunomiya1, Shota Nakagawa1, Yoshiki Tachihara1, Hiroto Sekiguchi1, Hiroshi Okada2,1 and Akihiro Wakahara1,2
Affiliations : 1; Department of Electrical and Electronic Information Engineering, Toyohashi University of Technology, Toyohashi, Aichi 441-8580, Japan 2; Electronics-Inspired Interdisciplinary Research Institute (EIIRIS), Toyohashi University of Technology, Toyohashi, Aichi 441-8580, Japan
Resume : An integration of light emitting devices on Si-CMOS platform is one of the most important technique to realize novel high speed and low power electronics-systems. A monolithic integration of light emitting devices is more suitable for large-scale integration than a mounting of discreat elements. However, a reliable monolithic integration method is still controversial. In this paper, we succeeded a monolithic integration of Si-nMOSFETs and GaN-µLEDs by using a Si/SiO2/GaN-LED structure which enables a seamless fabrication-process of heterogeneous devices. A 2-inch-scale Si/SiO2/GaN-LED wafer was fabricated from a silicon-on-insulator substrate and a SiO2/GaN-LED substrate using surface activated wafer-bonding method. The embedded SiO2 acts as an electrical isolation layer between top-Si and GaN-LED layers. Prior to device fabrication, thermal tolerance of top-Si and GaN-LED layers was examined and maximum temperature in whole process flow was designed to be less than 900 °C for ensuring theramal torelance of an InGaN active layer. GaN-LED driving circuits composed of Si-nMOSFETs (W/L=100/10 µm) and GaN-µLEDs (30 µm□) were fabricated in this wafer using a standard CMOS process line. Electrical properties of the Si-nMOSFETs and the GaN-µLEDs were comparable to those of discrete elements fabricated as reference. Optical output of GaN-µLED was modulated by the gate voltage for evaluation of dynamic characteristics.Optical modulation bandwidths in excess of 10 MHz, which was due to the limitation of measurement system, was shown. These results indicated that the monolithic integration of Si-MOSFETs and GaN-µLEDs using Si/SiO2/GaN-LED structure was successfully achieved.
Authors : Florian Le Goff, Jean Pierre Le Goec, Jean Decobert, Olivier Parillaud, Jean Luc Réverchon, Daniel Mathiot
Affiliations : III-V Lab ; III-V Lab; III-V Lab; III-V Lab; III-V Lab; iCube Laboratory (Université de Strasbourg and CNRS)
Resume : Nowadays short wavelength infrared (SWIR) imaging based on InP/InGaAs photodiodes is quite popular for uncooled camera. But, it remains expensive and only used for defense and scientific applications. Its cost comes essentially from the hybridization of photodiodes array with the read-out circuit, by the mean of an indium bump flip-chip process. So we suggest a new method of fabrication, in order to lowering the cost and providing a sustainable process to decrease the pixel pitch. A first challenge lies in molecular bonding of III-V structures on post-processed silicon wafers. The second challenge lies in 3D integrations achieved with “loop-hole” architecture in the III-V structure providing as well an interconnection to the readout circuit and circular photodiodes. These junctions are achieved after lateral zinc diffusion through via for p-type doping. But zinc diffusion and other processes have to be achieved at CMOS compatible temperature below 425°C compared to more than 500°C in standard process. The first attempts to diffuse Zn at temperature below 425°C were successful and photodiodes were fabricated; but results were erratic. The instability of InP during zinc diffusion is identified as the main origin. We will show that this behavior is due to the interaction of zinc with phosphorus, resulting in the formation of parasitic alloys. We will propose some thermodynamic explanations and solutions to stabilize InP during low temperature Zn diffusion. Finally we will present characterizations and performances of the photodiodes with the improved process.
Authors : R. Alcotte1,2, M. Martin1, R. Cipro1,2, T. Cerba1,2, S. David1, F. Bassani1, J. Moeyaert1, F. Ducroquet3, Y. Bogumilowicz2, B. Salem1, F. Chouchane1 E. Sanchez4, X.-Y. Bao4, J.B. Pin4, T. Baron1.
Affiliations : 1 Univ. Grenoble Alpes, LTM, F-38000 Grenoble, France CNRS, LTM, F-38000 Grenoble, France; 2 Univ. Grenoble Alpes, IMEP-LAHC, F-38000 Grenoble, France CNRS, IMEP-LAHC, F-38000 Grenoble, France; 3 Univ. Grenoble Alpes, F-38000 Grenoble, France CEA, LETI, MINATEC Campus, F-38054 Grenoble, France; 4 Applied Materials, 3050 Bowers Avenue, Santa Clara, CA 95054, USA
Resume : III-V materials integration on silicon is interesting to boost the performances of integrated circuits owing to electronic and optoelectronic properties. A key point to fabricate efficient high speed electronic, optoelectronic and RF devices is to be able to form low resistive Ohmic contacts on III-V. Indeed low resistive contacts are needed to avoid device performance degradation such as low on-state current, high power dissipation or high leakage current... To form low resistance Ohmic contacts different methods could be used and/or combined: (i) high doping level in the semiconductor, (ii) inserting an interlayer between metal and heavily doped semiconductor and (iii) optimization of the interface between metal and semiconductor i.e. metal alloying. In this presentation, we will focus on getting high doping level (n and p-type) in GaAs, InAs and alloys, grown directly on Si(100) 300 mm substrates by MOCVD. The maximum n-type doping levels are 1019 cm-3, 5x1019 cm-3 and 2x1019 cm-3 for GaAs, InAs and In53Ga47As, respectively while maximum p-type doping levels are 5x1019 cm-3 and 2x1019 cm-3 for GaAs and In53Ga47As. Then, we have studied and optimized the growth conditions to form a continuous thin InAs layer (30 nm) on Si(100), GaAs and InGaAs with low surface roughnes (≤ 2nm). The low band gap of InAs should favor a low resistive contact formation. We will present and compare the contact resistivity measured by transmission line model on our materials.
Authors : R. Blasco, A. Núñez-Cascajero, F. B. Naranjo, and S. Valdueza-Felip
Affiliations : University of Alcalá (GRIFO), Mdr-Bcn Road, km 33.6, 28871 Alcalá de Henares, Spain
Resume : In-rich AlInN alloys deposited by sputtering have been proposed as potential candidates to complement single-junction Si solar cells thanks to their tuneable direct bandgap within the visible spectral range. In this work we investigate the influence of material and device parameters (alloy composition, layer thickness and carrier lifetime, surface recombination, optical losses) on the photovoltaic characteristics of AlInN-on-silicon heterojunctions. For the electrical simulations we used the PC1D software, which was adapted to the specificities of III-nitride semiconductors. Devices based on 100 nm of n-Al38In62N (≈3×1020 cm-3) with a 2.4-eV bandgap on 500 µm p-Si, show promising results: open circuit voltage = 0.7 V, short-circuit current density = 3.4 mA/cm2, and fill factor = 76.7%, leading to a theoretical conversion efficiency of 17.7% under 1 sun of AM1.5G illumination without losses. Simulations show that for a given In content the main parameters responsible for the photoresponse degradation are the AlInN thickness, and surface recombination. Assuming an AlInN carrier lifetime approximately of 1 ps, a front/rear recombination rate of 105 cm/s, a Si resistivity of 10 Ω·cm, a Si front/rear recombination of 106cm/s, an interface diffusion of 2×1017cm-3 and no optical losses, the efficiency is reduced to 2.3% and the EQE drops to 60% at 600-950 nm spectral range, being in agreement with experimental results from n-Al38In62N on p-Si(111) junctions deposited by sputtering.
Heterointegration and Optoelectronic Devices II : tbd
Authors : D. Marris-Morini1, V. Vakarin1, P. Chaisakul1,3, J. Frigerio2, M. Rahman1, J. M. Ramírez1, D. Chrastina2, X. Le Roux1, L. Vivien1, G. Isella2,
Affiliations : 1 Institut d'Electronique Fondamentale, Univ. Paris-Sud, CNRS UMR 8622, Orsay, France ; 2 L-NESS, Politecnico di Milano, Polo di Como, Italy ; 3 Department of Materials Engineering, The University of Tokyo, Japan
Resume : Recent advances in the theoretical and experimental studies of Ge/SiGe quantum wells structures will be presented with a focus on optical telecommunication applications. Firstly, high-speed stand-alone Ge/SiGe QW electro-absorption modulators and photodetectors will be reported. It will be followed by the presentation of different methods for engineering Ge/SiGe QW to tune the operating wavelength to 1.3 µm. Then the demonstration of a strong electro-refraction Ge/SiGe QW will be reported. This effect could be used to achieve optical modulation but requires the embedding of the QWs in a Mach-Zehnder interferometer. Finally it will be shown that these active devices can be combined with advanced passive structures using Ge-rich SiGe virtual substrate on graded buffer as a waveguide.
Authors : T. Zabel (1), E. Marin (1), R. Geiger (1), C. Bozon (4), S. Tardif (3), K. Guilloy (3), A. Gassenq (2), J. Escalante (2), Y. M. Niquet (3), I. Duchemin (3), J. Rothman (2), N. Pauc (2), F. Rieutord (3), V. Reboud (2), V. Calvo (3), J. M. Hartmann (2), J. Widiez (2), A. Chelnokov (2), J. Faist (4), H. Sigg (1)
Affiliations : (1) Laboratory for Micro- and Nanotechnology, Paul Scherrer Institute, 5232 Villigen, Switzerland; (2) CEA-LETI Minatec Campus, F-38054 Grenoble, France; (3) University Grenoble Alpes CEA INAC, F-38000 Grenoble, France; (4) Institute for Quantum Electronics, ETH Zürich, 8093 Zürich, Switzerland
Resume : Vast progress in the fabrication of highly strained germanium (Ge) using a wafer-scalable micro-bridge technology  has given the perspective of a direct bandgap optical gain material  for the realisation of CMOS compatible laser sources. However, a key development step towards such a laser is the integration of a strain conserving optical cavity. Previous studies included DBR cavities with strain values of 2.5%  or less . We present design, realisation and analysis of a novel corner cube cavity based on etched facets forming a pairs of parabolic mirrors placed at either side of the micro-bridge. The design offers intrinsic cavity Q-factors in excess of 2000, as is calculated from finite element simulations. Using optical graded GeOI , we achieved uniaxial strain values of 4.2%, as verified by micro-XRD calibrated Raman spectroscopy , and we investigated the photoluminescence (PL) at temperatures down to 20 K.  We evaluate the gain and loss via Fabry-Perot mode analysis and show Q-factors larger than 900 in the mid infrared regime. In conclusion, a high Q-factor cavity design compatible with the strain-engineering pattern is presented, providing a promising component for achieving lasing in tensile-strained direct bandgap Ge.  M. Süess, et al., Nat. Phot. v7, 488 (2013)  R. Geiger, et al., arXiv:1603.03454  Petykiewicz, et al., Nano Lett., 16, 2168 (2016)  A. Gassenq, et al., Optical Society of America, 2015, paper CB_11_1  V. Reboud, et al., Proc. SPIE 936714, 1–6 (2015)  A. Gassenq, et al., arXiv:1604.04391
Authors : Y. Berencén,a) F. Liu, M. Wang, S. Zhou, L. Rebohle, M. Helm, W. Skorupa and S. Prucnal
Affiliations : Institute of Ion Beam Physics and Materials Research, Helmholtz-Zentrum Dresden-Rossendorf, P.O. Box 510119, 01314 Dresden, Germany
Resume : The development of room-temperature short-wavelength infrared Si photodetectors is of paramount importance for optical communications, integrated photonics, sensing and medical imaging applications . The typical peak photoresponse of conventional Si photodetectors is between 700 and 900 nm, which is mainly limited by the 1.12 eV-Si indirect band gap. Nevertheless, such intrinsic material limitation can be circumvented by introducing transition metals or chalcogens into the Si band gap at concentrations far above those obtained at equilibrium conditions [1, 2]. This new class of hyperdoped materials with a donor impurity band has been postulated as a viable route to extend the Si photoresponse at the short-wavelength infrared spectral region . In this work, we report on the significant room-temperature photoresponse and performance at wavelengths as long as 3100 nm as exhibited by hyperdoped Si p-n photodiodes fabricated by Se implantation followed by flash lamp annealing (FLA). The FLA approach in the millisecond range allows for a solid-phase epitaxy that has been reported to be superior to liquid-phase epitaxy induced during pulsed laser annealing . The success of our devices is primarily based on the high quality of the developed n-type hyperdoped material, which is single-phase single crystal with high electrical activation, without surface segregation of Se atoms and with an optically flat surface.  J. P. Mailoa, A. J. Akey, C. B. Simmons, D. Hutchinson, J. Mathews, J. T. Sullivan, D. Recht, M. T. Winkler, J. S. Williams, J. M. Warrender, P. D. Persans, M. J. Aziz, and T. Buonassisi, Nat. Commun. 5, 3011 (2014).  S. Zhou, F. Liu, S. Prucnal, K. Gao, M. Khalid, C. Baehtz, M. Posselt, W. Skorupa, and M. Helm, Sci. Rep. 5, 8329 (2015).  I. Umezu, J. M. Warrender, S. Charnvanichborikarn, A. Kohno, J. S. Williams, M. Tabbal, D. G. Papazoglou, X. C.Zhang, and M. J. Aziz, J. Appl. Phys. 113, 213501 (2013). a)Corresponding author: firstname.lastname@example.org
Authors : Michael R. Barget, Mario Lodari, Valeria Mondiali, Daniel Chrastina, Monica Bollani, Emiliano Bonera
Affiliations : Dipartimento di Scienza dei Materiali, Università di Milano–Bicocca, via Cozzi 55, I-20125 Milano, Italy and L-NESS, via Anzani 42, I-22100 Como, Italy; L-NESS, Dipartimento di Fisica, Politecnico di Milano, Polo di Como, via Anzani 42, I-22100 Como, Italy and IFN-CNR, L-NESS, via Anzani 42, I-22100 Como, Italy; L-NESS, Dipartimento di Fisica, Politecnico di Milano, Polo di Como, via Anzani 42, I-22100 Como, Italy; L-NESS, Dipartimento di Fisica, Politecnico di Milano, Polo di Como, via Anzani 42, I-22100 Como, Italy; IFN-CNR, L-NESS, via Anzani 42, I-22100 Como, Italy; Dipartimento di Scienza dei Materiali, Università di Milano–Bicocca, via Cozzi 55, I-20125 Milano, Italy and L-NESS, via Anzani 42, I-22100 Como, Italy;
Resume : Integration of photonics and electronics still lacks a light source that is monolithically integrable into existing CMOS technology. Germanium is investigated as a promising candidate for the active gain medium for a laser source, since it is CMOS compatible and because of its quasi-direct band-structure. Tensile strain in Ge decreases the energy barrier between the indirect and direct conduction band valleys to facilitate carrier injection into the direct gap in Γ. We propose a top-down method to strain Ge on Si layers by nano-structured SiGe layers. The method consists of the coherent growth of SiGe on Ge. The tensile SiGe top-layer can relax when trenches are carved, thereby pulling apart the Ge in between. FEM strain simulations show that the effect of SiGe nanostructures can be stronger if their perimetral forces are exerted on a Ge membrane rather than on bulk. The enhancement of elastic energy transfer from nanostructure to the membranes can result in the fabrication of larger strained regions of Ge. We present our first µRaman results for SiGe stressors on 100 nm thick Ge suspended membranes. While the strain is still below the induction of a direct-gap transition, we can show that SiGe nanostructures fabricated on a membrane are about twice as effective in creating strain as compared to the same nanostructures created on bulk Ge.
Authors : A. Núñez-Cascajero, R. Blasco, S. Valdueza-Felip, M. González-Herráez, F.B. Naranjo
Affiliations : Grupo de Ingeniería Fotónica, Universidad de Alcalá, Departamento de Electrónica, Alcalá de Henares, Madrid, Spain
Resume : AlInN material has been proposed as suitable candidate for photovoltaic applications due to its tunable band gap energy as function of In composition. In previous studies we successfully achieved the growth of compact 500 nm-thick Al0.38In0.62N layers directly on Si (111) substrates by RF sputtering. This low cost technique allows low temperature deposition enabling its compatibility with Si-based solar cells. The application of AlInN for this technology requires a precise control of the properties of AlInN/Si interface. In this study we investigate the effect of introducing an AlN buffer layer on the quality of the subsequent AlInN layer on Si (111). A set of 80 nm thick Al0.38In0.62N samples was deposited by sputtering using an AlN buffer layer with thickness ranging from 0 to 25 nm. X-ray diffraction measurements show the AlInN (0002) diffraction peak with wurtzite structure pointing to no phase separation. The AlN (0002) peak is also noticeable for the two samples with the highest AlN buffer layer thickness (15 and 25 nm). A reduction of the FWHM of the rocking curve around (0002) AlInN reflection occurs when introducing an AlN buffer with thickness up to 15 nm. Atomic force microscopy measurements point to a surface roughness of the samples of 1.4±0.3 nm regardless the buffer thickness. Transmittance measurements in similar structures deposited on sapphire reveal an absorption band edge around 2.2 eV, appropriate for solar-cell applications.
Growth on Nanopatterned Surfaces and Seeded Growth : C. Merckling
Authors : Gang Niu1,2*, Giovanni Capellini1,3, Grzegorz Lupina1, Tore Niermann4, Marco Salvalaglio5, Anna Marzegalli5, Markus Andreas Schubert1, Peter Zaumseil1, Hans-Michael Krause1, Oliver Skibitzki1, Viktoria Schlykow1, Michael Lehmann4, Francesco Montalenti5, Ya-Hong Xie6, Thomas Schroeder1,7
Affiliations : 1. IHP, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany 2 Electronic Materials Research Laboratory, Key Laboratory of the Ministry of Education & International Center for Dielectric Research, Xi'an Jiaotong University, Xi'an 710049, China 3 Dipartimento di Scienze, Università Roma Tre, Viale Marconi 446, 00146 Rome, Italy 4 Technische Universität Berlin, Institut für Optik und Atomare Physik, Straße des 17. Juni 135, 10623 Berlin, Germany 5 L-NESS and Dept. of Materials Science, Università degli Studi di Milano-Bicocca, via Cozzi 55, I-20125 Milan, Italy 6 University of California at Los Angeles, Department of Materials Science and Engineering, Los Angeles, CA 90095-1595, USA 7 BTU Cottbus-Senftenberg, Konrad-Zuse-Straße 1, 03046 Cottbus,
Resume : Germanium (Ge), the semiconductor material at the base of the first transistor, is experiencing a renaissance due to its superior properties over that of silicon. High quality Ge nanocrystals on silicon are very attractive for both electronic and optoelectronic devices. However, the relatively large lattice mismatch and thermal expansion coefficient (TEC) mismatch make it a quite challenging task to realize defect-free Ge materials on Si. Furthermore, the Ge-Si interdiffusion causes difficulty in the control of the resulting heterostructure. In this talk, we demonstrate a new technique, namely, selective epitaxy of Ge on nano-tip patterned Si (001) wafers, which enables fully coherent Ge islands. We will discuss the pattern-independent selectivity mechanism of Ge. High growth temperatures (>750°C) are required for growth selectivity but a “geometric intermixing hindrance” effect of the Si-tip wafer confines intermixing to the pedestal region. Thanks to the strain partitioning between Ge and Si tips, the thin intermixing layer has a beneficial role to prevent the formation of misfit dislocations (MDs) at the advantage of a fully elastic relaxation. Moreover, no other defects like twins or stacking faults was observed in the Ge island volume. We shall see the key enabler of this peculiar growth mode is the shape and size of the patterned Si substrate used as “seed” for the selective epitaxy. The beneficial influence of this innovative approach on optoelectronic materials properties is demonstrated by photodetection in hybrid graphene / Ge island / Si-tip nanostructures.
Authors : Viktoria Schlykow 1, Gang Niu 1,2, Noriyuki Taoka 1,3, Marvin H. Zöllner 1, Oliver Skibitzki 1, Peter Zaumseil 1, Giovanni Capellini 1,4, Yuji Yamamoto 1, Wolfgang M. Klesse 1, Thomas Schroeder 1,5
Affiliations : 1 IHP, Im Technologiepark 25, 15236 Frankfurt (Oder), Germany 2 Xi'an Jiaotong University, Xi'an 710049, China 3 National Institute of Advanced Industrial Science and Technology, 305-8568, Japan 4 Università degli Studi Roma Tre, I-00146 Roma, Italy 5 BTU Cottbus-Senftenberg, 03046 Cottbus, Germany
Resume : Over the last decade, complementary-metal-oxide-semiconductors (CMOS) compatible GeSn alloys have attracted wide attention for a high variety of applications. For both optical and electronic devices GeSn alloys enable high-level control of the band structure by carefully adjusting the Sn content. For instance, a slight doping of Sn of 2 % into Ge enhances its absorption behavior at optical telecommunication wavelengths (1.55 1.62 μm). However, to realize high-performance optical devices, the synthesis of high quality GeSn alloys on Si faces crucial challenges, such as minimizing crystalline defects and Si interdiffusion at the interface. To solve these problems, here we explore nanoheteroepitaxy as a promising approach by examining in detail the impact of various growth conditions on the structural and optical properties of GeSn islands on pre patterned Si(001) nano-pillars surrounded by SiO2 . Using molecular beam epitaxy we demonstrate that single crystalline, fully relaxed GeSn nanocrystals can be selectively grown directly on Si(001). Scanning electron microscopy, x ray diffraction and transmission electron microscopy measurements point towards 600°C as an optimized growth temperature to achieve both high selectivity and Sn contents up to 1.4 %, while at the same time suppressing Si interdiffusion. Finally, the high crystal quality of such GeSn nano islands is confirmed by room temperature photoluminescence, revealing a redshift of the bandgap energy from that of pure Ge.
Authors : Y.Miyanami1,2, G Boccardi1, N. Collaert1, M.Nakazawa1,2, A. Thean1, C. Merckling1
Affiliations : 1imec, Kapeldreef 75, 3001 Leuven, Belgium; 2Sony Semiconductor Solutions Corporation, 4-14-1, Asahi-cho, Atsugi-shi, Kanagawa, 243-0014, Japan
Resume : For future CMOS (Complementary Metal-Oxide-Semiconductor) devices beyond 10nm technology node, III-V semiconductor such as Indium Gallium Arsenide compounds (InxGa1-xAs) is predicted to be the main candidate for high mobility n-type channel. For this, the heterogeneous combination of III–Vs and Si is an attractive option due to the compatibility with the common Si-based platform and large scale wafer processing. However, the main issue of III-V compounds integration on Si is the large lattice mismatch (fInP/Si=8.06%) which will generate the formation of crystal defects during the growth process, such as treading dislocations(TDs) stacking faults(SFs), and then degrade the device performances. In that context, we developed an epitaxial process based on selective area growth (SAG) in wide trenches(W>200nm) on an on-axis(001)-oriented Si patterned substrate. III-V heterogeneous SAG in such wide field trenches presents multiple advantages in the choice of final device such as scaled single or multi-layer channel FinFET, Gate-All-Around (GAA), but also etched vertical nanowires. The main growth challenge is to reduce defect density in the InP buffer which is used to integrate the InGaAs channel after a planarization process step. For this we make use of several approaches to improve the InP buffer crystallinity such as V-groove engineering, buffer growth conditions, and post annealing studies. As a result, we could demonstrate a strong defect density reduction in the final wide field III-V epitaxial grown InGaAs channel layer.
Authors : Ziyang Liu1,2, Clement Merckling1, Rita Rooyackers1, Alexis Franquet1, Olivier Richard1, Hugo Bender1, Maria Vila Santos3, 4, Juan Rubio-Zuazo3, 4, Germán R. Castro3, 4, Nadine Collaert1, Aaron Thean1, Wilfried Vandervorst1,5 and Marc Heyns1,2
Affiliations : 1 imec, Kapeldreef 75, 3001, Leuven, Belgium 2 Department of Metallurgy and Materials Engineering, KULeuven, 3001, Leuven, Belgium 3 SpLine CRG BM25 Beamline, European Synchrotron Radiation Facility, 71, Avenue des Martys, 38000, Grenoble, France 4 Instituto de Ciencias de Materiales de Madrid, Consejo Superior de Investigaciones Científicas (ICMM -CSIC) Madrid, Spain 5 Department of Physics and Astronomy, KULeuven, 3001, Leuven, Belgium
Resume : Vertical InAs nanowire (NW) is a promising building block for the next generation electrical and optical devices. The quality of InAs NW selective area epitaxy (SAE) on Si substrate heavily relies on the surface pre-treatment strategy. However the early stage of InAs SAE on Si (111) substrate is much less investigated. Here we report the study of the Si surface at the initial stage of the InAs growth. A contamination problem on Si (111) surface at the beginning of high yield InAs NW growth is identified by time-of-flight secondary ion mass spectrum. These contaminants form an interfacial layer in a certain chemical stoichiometry afterwards, as identified by synchrotron grazing incident X-ray diffraction and electron dispersive spectrum. Our study shows that the interfacial layer between InAs and Si substrate is crucial for the nucleation of InAs NW during SAE. High yield (99.3%) InAs NWs SAE is achieved by using a nucleation layer playing the same role in a controlled way. This study is able to shed some light on the impact of atomic configuration between non-polar Si substrate and polar III-V epi-layer on the hetero-structure nucleation.
Authors : C. Renard1, T. Molière1, N. Cherkashin2, A. Jaffré3, L. Vincent1, J. Alvarez3, G. Hallais1,J. Connolly4, M. Coste1, D. Mencaraglia3, D. Bouchier1
Affiliations : 1 : IEF, CNRS, Univ Paris-Sud, Université Paris-Saclay, Orsay, France; 2 : CEMES-CNRS and Université de Toulouse, 29 rue Jeanne Marvig, 31055 Toulouse, France ; 3: GeePs, UMR CNRS 8507, CentraleSupelec, Univ Paris-Sud, Sorbonne Universités, UPMC Univ Paris 06, Université Paris-Saclay, 11 rue Joliot Curie, Plateau de Moulon, 91192, Gif sur Yvette, France ; 4 : Universidad Politécnica de Valencia, NTC, Camino de Vera s/n. 46022, Valencia, Spain.
Resume : The interest in the integration of GaAs on Si is becoming stronger each year and is guided by applications in highly active areas such as silicon-based microelectronics technologies or photovoltaic. Significant improvements have been reported for many years, thanks to selective area epitaxy of GaAs on Si substrates patterned with dielectric films. However, these layers are inappropriate for applications involving electronic transport between GaAs and Si at a large scale. To overcome these problems we have developed a technique based on the Epitaxial Lateral overgrowth on Tunnel Oxide from nano-seed (ELTOn) of micrometer scale GaAs crystals on a 0.6 nm thick SiO2 layer from nanoscale Si seeds. This method permits the integration of high quality and defect-free crystalline GaAs on Si substrate and provides active GaAs/Si heterojunctions with efficient carrier transport through the thin SiO2 layer. The nucleation from small width openings avoids the emission of misfit dislocations and the formation of antiphase domains. With this method, we have experimentally demonstrated for the first time a monolithically integrated GaAs/Si diode with high current densities of 10 kA.cm−2 for a forward bias of 3.7 V. This epitaxial technique paves the way to hybrid III–V/Si devices that are free from lattice-matching restrictions, and where silicon not only behaves as a substrate but also as an active medium.
Heteroepitaxy and Interfaces : tbd
Authors : Fabrizio Rovaris, Roberto Bergamaschini, Francesco Montalenti
Affiliations : L-NESS and Dipartimento di Scienza dei Materiali, Via R. Cozzi 55, 20126 Milano (Italy).
Resume : We introduce a continuum model allowing one to tackle heteroepitaxy on silicon at laboratory time and size scales, while capturing the complex interplay between elastic and plastic relaxation. In the model, material redistribution is described by a surface-diffusion equation, and local atomic accumulation/depletion is determined by differences in chemical potential. The latter is determined based on local curvature and elastic energy, numerically computed at each step by using Finite Element Methods. A wetting term is also added, as required to properly simulate the Stransky-Krastanow growth regime. Importantly, misfit dislocations are introduced in the system on the fly, based on a suitable energetic criterium : while the profile evolves in time, scans are made to individuate possible positions where the presence of a linear defect would lower the elastic energy of the system. If the search is successful, a dislocation is added and its contribution to the chemical potential is computed in further evolution. While the model is rather simple and implemented in 2D only, it seems to predict all main experimental evidence reported in the literature, namely: (a) oscillations in SiGe islands shape and aspect ratio upon insertion of dislocations [2,3] (b) accelerated growth dynamics of dislocated islands vs. coherent ones  (c) kinetic suppression of islanding in “two-temperature” deposition techniques  The present model paves the way for the development of a reliable and predictive growth simulator tackling both morphological evolution and defects’ distribution during heteroepitaxial deposition in typical industrial growth chambers.  F. Rovaris, R. Bergamaschini, and F. Montalenti (2016, submitted)  F.K. LeGoues et al., Phys. Rev. Lett. 73, 300 (1994).  M. Stoffel et al., Phys. Rev. B 74, 155326 (2006).  E. Colace et al., Appl. Phys. Lett. 72, 3175 (1998).
Authors : Y. Bogumilowicz1), J.M. Hartmann1), N. Rochat1), A. Salaun1), M. Martin 2), F. Bassani2), T. Baron2), S. David2), X.-Y. Bao3), and E. Sanchez3)
Affiliations : 1 Univ. Grenoble Alpes, F-38000 Grenoble France CEA, LETI, MINATEC Campus, F-38054 Grenoble, France 2 Univ. Grenoble Alpes, F-38000 Grenoble France CNRS-LTM, F-38054 Grenoble, France 3 Applied Materials, Santa Clara, California, United States
Resume : Performance enhancement in future integrated circuits will come from the integration of new materials into the existing silicon platform (with leading edge manufacturing plants). The electron mobility in cubic, direct bandgap III-V semiconductors is indeed several times higher than in Si. Their integration on Si substrates is not that easy due to (i) differences in thermal expansion coefficients, (ii) the polar nature of III-V alloys (Anti-Phase Boundaries, APB) and (iii) a greater than 4% lattice mismatch. The first issue can be solved by limiting the total epitaxial thickness, the second one by the use of the proper surface preparation and the right growth conditions. However, the lattice mismatch will result in high densities of threading dislocations in III-V epitaxial films on Si. We have grown thanks to Metal Organic Chemical Vapor Deposition GaAs and InP layers on 300 mm substrates with various Ge buffer thicknesses. Those buffers were used to partly or nearly fully accommodate the lattice parameter mismatch between III-Vs and Si. We have characterized those films using AFM, bow measurement, PL, CL and XRD. We have extracted the threading dislocation density (TDD) in GaAs and InP. Our films were APB-free and smooth (at least for GaAs films). The lowest TDD achieved, around 1E7 cm-2 in 300 nm thick GaAs films, was obtained for the thickest Ge buffer (1.4 µm). Further reduction of this density (in blanket films) implies accepting a larger curvature of the wafer or the cracking of the epilayers.
Authors : Khushabu. S. Agrawal, Vilas. S. Patil and A. M. Mahajan
Affiliations : Department of Electronics, North Maharashtra University, Jalgaon, India (MS) – 425001
Resume : The Moore’s law reached to its fundamental limits, novel device structures and materials like FinFET, 3D transistors, High-k metal gate, and compound semiconductor based structures are taken in account for further scaling of CMOS devices, attributes to enhancement in speed of the devices. Ge MOS is one of them, where it offers the high mobility channel material. Generally, (100) orientation substrates are in use as it offers the low interface trap densities. The use of high mobility channel material with different orientation has been proposed in this work, which may be the cause for further enhancement in channel mobility. In this work, the (110) orientation germanium substrates were used with high-k/metal gate (HK/MG) stack for the deposition. Prior to deposition, the Ge surface was treated thermally by means of NH3 annealing. The 5 nm thick HfO2 has been deposited on surface nitrided germanium (110) by using atomic layer deposition technique. Further, the deposition of HfO2 and GeON has been verified by means of XPS. The electrical properties have been studied by forming metal gate contacts of Cr and Au bilayer over deposited films. The Ge MOS device with HfO2/GeON gate stack shows the better device properties than that of (100) orientation substrate devices in terms of interface trap density (5.5 x 1010 cm-2eV-1). Keywords: Ge MOS, HK/MG, Nitridation. Dit
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More than Moore I: Low-dimensional materials and alternative devices : tbd
Authors : Neil Curson, Georg Gramse, Alex Kölker, Tingbin Lim, Enrico Brinciotti , Hari Solanki, Steven R. Schofield, Taylor Stock, Gabriel Aeppli, Ferry Kienberger
Affiliations : University College London, London WC1H 0AH, UK, Johannes Kepler University, Biophysics Institute, Gruberstrasse 40, 4020 Linz, Austria; London Centre of Nanotechnology, University College London, London WC1H 0AH, UK; London Centre of Nanotechnology, University College London, London WC1H 0AH, UK; Keysight Technologies Austria GmbH, Keysight Labs, Gruberstrasse 40, 4020 Linz, Austria; London Centre of Nanotechnology, University College London, London WC1H 0AH, UK; London Centre of Nanotechnology, University College London, London WC1H 0AH, UK; London Centre of Nanotechnology, University College London, London WC1H 0AH, UK; ETH, Department of Physics, CH-8093 Zurich, Switzerland; Keysight Technologies Austria GmbH, Keysight Labs, Gruberstrasse 40, 4020 Linz; London Centre of Nanotechnology
Resume : It is now possible to create atomically thin regions of dopant atoms in silicon, patterned with lateral dimensions ranging from the atomic-scale (angstroms) to microns. Such structures are now being created to produce quantum electronic devices for physics research and in future will form crucial components of next generation integrated circuits and quantum information processing devices. I will report on our progress towards fabrication and characterisation of these devices. Recently we have used scanning microwave microscopy (SMM) to image atomically thin patterned phosphorus (P) structures, buried ~15 nm below the silicon surface, with lateral dimensions varying from a few microns to tens of nanometers. The buried structures are fabricated using a scanning tunneling microscope based strategy. The SMM technique is completely non-invasive and highly sensitive to the electrical properties of the atomically thin P structures, with their sheet resistance determined to be in the range of a few ksq. By combining SMM with appropriate calibration algorithms and finite element modelling we can quantify the depth of the dopant structures (~15 nm) solely using the SMM technique, as confirmed by secondary ion mass spectrometry (SIMS) calibration measurements. At this depth we obtain a lateral imaging resolution down to ~60 nm. The ability to determine depth and electrical characteristics of buried P nanostructures leads the way towards 3D imaging of nanoscale electrical devices.
Authors : H Lu, Y Guo, J Robertson
Affiliations : Engineering Dept, Cambridge University, Cambridge, UK
Resume : 2-dimensional (2D) materials are promising for future electronic devices like FETs and low power sensors. However, their performances are often limited by contact resistance, which can be due to dimensionality effects and Schottky Barriers (SB) at the contacts. The SBs often show Fermi level pinning (FLP), which prevent us from choosing contact metals with the suitable work function to control the Schottky barrier height (SBH). Graphene has little FLP  while transition metal dichalcogenides (TMD) have strong FLP [2,3]. In order to understand the origin of FLP in 2D systems, it is interesting to study its chemical trends in an extreme system such as the hexagonal B, Al and Ga Nitrides (h-XN). The SBHs ϕn of top metal contacts on monolayer h-XN are calculated using supercell models and density functional theory (DFT). The Fermi level pinning factor S is calculated as the slope of the SBH against metal work function, S = dϕn/dΦM. For h-BN, we found S = 0.99, that is no pinning. This is consistent with previous work . For the h-AlN and h-GaN, we calculated S = 0.64 and 0.63 respectively, with some pinning. This is still a higher value of S that in defect-free MoS2, for which S = 0.3. The reason for the chemical trends are as follows. Graphene is sp2 bonded, and there is an energy barrier separating the sp2 from the sp3 state, so that metals on graphene leave the C atoms in their sp2 state. A similar behavior is found for h-BN. BN is more stable with sp2 bonding, most metals have a physiorption interaction with h-BN. This leaves BN layers planar, and the equilibrium distances between the metal atoms and the B or N are 3.0Å to 3.5Å, with van der Waals interactions. In contrast, the h-AlN and h-GaN layers undergo buckling, with chemisorption bonds form metals and N sites. The distances between AlN/metals and GaN/metals range from 2.0Å to 2.3Å, indicating that layers are connected mainly by chemical bond. This is because GaN and AlN are more stable in the sp3 state. In the case of MoS2 and the other metal dichalcogenides, the S or Se atoms are able to overcoordinate beyond their 3-fold bonding, so the metal contact atoms form full chemical bonds to them, and there is strong Fermi level pinning. Thus, chemistry is very important, not just dimensionality. Of course in MoS2, the contacts are dominated by defects which cause stronger FLP, but the effects of defects at h-BN or h-AlN are less. 1. Giovannetti G, Khomyakov P A, Brocks G, et al. Doping graphene with metal contacts. Phys. Rev. Letts, 2008, 101(2): 026803. 2. Guo Y, Liu D, Robertson J. 3D Behavior of Schottky Barriers of 2D Transition-Metal Dichalcogenides. ACS Appl Mater Interfaces, 2015, 7(46): 25709-25715. 3. Kang J, Liu W, Sarkar D, et al. Computational study of metal contacts to monolayer transition-metal dichalcogenide semiconductors. Phys. Rev. X, 2014, 4(3): 031005. 4. Bokdam M, Brocks G, Katsnelson M I, et al. Schottky barriers at hexagonal boron nitride/metal interfaces: A first-principles study. Phys. Rev. B, 2014, 90(8): 085415.
Authors : F. Giannazzo (1), A. Piazza (1,2,3), G. Fisichella (1), G. Greco (1), S. Di Franco (1), R. Lo Nigro (1), I. Deretzis (1), C. Bongiorno (1), G. Nicotra (1), C. Spinella (1), A. La Magna (1), S. Agnello (2), F. Roccaforte (1)
Affiliations : (1) Consiglio Nazionale delle Ricerche – Istituto per la Microelettronica e Microsistemi, Strada VIII, n. 5 – Zona Industriale, 95121 Catania, Italy (2) Department of Physics and Chemistry, University of Palermo, Via Archirafi 36, 90143 Palermo, Italy (3) Department of Physics and Astronomy, University of Catania, Via Santa Sofia, 64, 95123 Catania Italy
Resume : MoS2 recently attracted high interest as a potential candidate for post-Si CMOS technology. MoS2 is unintentionally n-type doped and most of the metals exhibit a Fermi level pinning below its conduction band. Hence, only accumulation mode n-channel FETs with Schottky source/drain contacts are easily obtained with pristine MoS2. On the other hand, p-type doping under the contacts and/or tailoring of the metal/MoS2 Schottky barrier are required for efficient hole injection, in order to obtain the complementary inversion mode p-channel FETs. O2 plasma treatments have been considered for selective area p-type doping of MoS2, but the doping mechanism is still unclear. In this work, temperature-dependent electrical characterization of MoS2 FETs with source/drain contacts on pristine and O2 plasma irradiated MoS2 have been carried out, demonstrating a striking change in the transistors electrical characteristics, i.e., from n-type conduction to ambipolar behaviour. High resolution current mapping by conductive atomic force microscopy  shed light into the current injection mechanisms from the metal to the virgin or O2 plasma treated MoS2 surface. These local electrical measurements, combined with high resolution transmission electron microscopy, electron energy loss spectroscopy and ab-initio simulations, allowed to clarify the effect of O2 plasma functionalization under the contacts on the MoS2 transistors electrical behaviour.  F. Giannazzo, et al., PRB 92, 081307(R) (2015)
Authors : D. Rubi1,2, W. Román Acevedo1, U. Lüders3, F. Golmar4, P. Levy1
Affiliations : 1 GIyA y INN, CNEA, Av.Gral Paz 1499, (1650), San Martín, Buenos Aires, Argentina; 2 Escuela de Ciencia y Tecnología, UNSAM, Campus Miguelete, (1650), San Martín, Buenos Aires, Argentina; 3 CRISMAT, CNRS UMR 6508, ENSICAEN, 6 Boulevard Maréchal Juin, 14050 Caen Cedex 4, France; 4 INTI - CMNB, Av. Gral Paz 5445 (B1650KNA), San Martín, Buenos Aires, Argentina
Resume : Resistive switching (RS) is defined as the reversible and non-volatile change of the electrical resistance of metal-insulator-metal structures upon the application of electrical stress . The most straightforward implementation of RS devices, usually called “memristors”, is as Resistive Random Access Memories (ReRAM); however, their potential goes beyond this particular application. Memristive systems were demonstrated to be able to perform logical operations  and, in addition, they were shown to have a similar behavior than the bit-cells of the human brain (synapses) . These findings suggest that memristive devices may constitute an important technological breakthrough in the near future. Here we fabricated and characterized metal/La1/3Ca3/2MnO3 memristive devices on highly doped silicon, which turn them especially suited to be integrated with standard electronics. The oxide was grown by pulsed laser deposition and the top electrode was deposited and shaped by sputtering and optical lithography, respectively. We have previously shown that different RS mechanisms coexist in these kind of devices , asking for a careful analysis to disentangle and control them. In the present case, we found that using current as electrical stimulus unveils an intermediate resistance state in addition to the usual high and low resistance states that are observed in standard voltage controlled experiments. Based on detailed electrical characterization (I-V curves and hysteresis switching loops, temperature dependence of the resistive states, impedance spectroscopy), we suggest that the dominant RS mechanism in these samples comes from the electrical field induced oxygen transfer between the native SiOx layer present at the manganite/silicon interface and the nearby manganite layer. We have also found that after hard electrical breakdown, our devices can be turned functional again by performing a low temperature annealing in air, suggesting the possibility of designing devices with “self healing” capability that could be activated through local power dissipation.  A. Sawa, Mater. Today 11, 28 (2008).  J.Borghetti, G. S. Snider, P. J. Kuekes, J. J. Yang, D.R. Stewart & R. S.Williams, Nature 464, 8 (2010)  Jo et al., Nano Lett. 10, 1297 (2010)  D. Rubi, F. Tesler, I. Alposta, A. Kalstein, N. Ghenzi, F. Gomez-Marlasca, M. Rozenberg, and P. Levy, App. Phys. Lett. 103, 163506 (2013); N. Ghenzi, M. J. Sánchez, D. Rubi, M. J. Rozenberg, C. Urdaniz, M. Weissman, and P. Levy, Appl. Phys. Lett 104, 183505 (2014)
Authors : Marwa Ben Elbahri1,Abdelkader Kahouli1, Wolfgang Donner2 and Ulrike Lüders1
Affiliations : 1.CRISMAT UMR 6508 CNRS-ENSICAEN-Normandie Université, 6 Blvd Maréchal Juin, 14000 CAEN Cedex, France 2.Technical University of Darmstadt, Department of Materials Science, 64287 Darmstadt, Germany
Resume : The increase in dielectric constant with the reduction of the leakage current of a dielectric material has become a crucial application of the microelectronics industry to improve the performance of electronic devices. The dielectric properties and the interface effects of a dielectric material consisting of amorphous laminates of Al2O3 and TiO2 with sub-nanometer individual layer thicknesses deposited by Pulsed Laser Deposition were studied. A high dielectric constant due to the Maxwell-Wagner effect is obtained. This effect is well-known in inhomogeneous dielectrics related to an intermixing of insulating and semiconducting regions. In the case of the sub-nanometric laminates, the insulating region is the Al2O3 and the semiconducting one is TiO2. Dielectric properties of subnanometric laminate change depending on the bottom electrode and total thickness. Chemical effects at the interface with the dielectric and top and bottom electrodes play a major role in promoting the dielectric properties. Thus, the permittivity enhances by changing Si by TiN as a bottom electrode but dielectric losses become an issue. The incorporation of an insulating layer between the dielectric and the top and bottom electrodes reduces losses and leakage current, preserving the high permittivity.
Transistors : tbd
Authors : G. Larrieu, Y. Guerfi, N. Mallet, A. Lecestre
Affiliations : LAAS CNRS, Toulouse, France
Resume : Today, the physical limitations of nanoscale transistors operation, in particular the increasing of the power consumption per chip have led to the development of innovative MOS architectures. Nanowire (NW) MOSFETs are considered the most promising candidates to pursue the downscaling of MOS transistors, outperforming of triple gate FinFET architectures for sub- 7 nm technology node.  because of their suitability for gate‐all‐around (GAA) architecture which represents the ideal case for the electrostatic control and can ensure the further reduction of the “ultimate” transistor size . Nevertheless, the current that flows through the device when it is turned on (current drive) remains low, as it is limited by the small section of the NWs. It is therefore essential not to implement a transistor on a single wire but on nanowire arrays so to combine the excellent electrostatic control with a high current level. In that context, vertical integration is a particularly attractive approach because of its 3-D character, which is more favorable to scale the contacted gate pitch i.e. scaling of the gate length and contact area . The vertical NW array based transistor is much easier to manufacture, because the gate length is simply defined by the thickness of the deposited gate material . Here, we present such architectures with noteworthy demonstrations both in processing (layer engineering at nanoscale, vertical integration of a short gate length), in electrical properties (high electrostatic control, low defect level, multi-Vt platform), in the architecture (CMOS inverter) and in the perspective of ultimate scaling  I. Ferain et al. Nature, vol. 479, p. 310–316, (2011).  K. J. Kuhn et al. Proceeding of IEEE International Electron Devices Meeting (IEDM), p.171-174, (2012).  T.H. Bao et al. Proceeding of 44th European Solid State Device Research Conference (ESSDERC), , p.102-105 (2014).  G. Larrieu and X.-L. Han. Nanoscale, vol. 5, p. 2437-2441, (2013).
Authors : E. Capogreco (1,2), A. Arreghini (1), J. G. Lisoni (3), B. Kunert (1), W. Guo (1), K. De Meyer (1,2), G. Van den bosch (1), J. Van Houdt (1), A. Furnemont (1)
Affiliations : (1) imec, Kapeldreef 75, B3001 Leuven Belgium; (2) ESAT department, Katholieke Universiteit Leuven, Leuven Belgium; (3) Universidad Austral de Chile, Valdivia Chile
Resume : In this paper TCAD simulations are performed to investigate the impact of composition and doping inhomogeneity on the drain current variability observed in epitaxial InGaAs channels for 3-D NAND memories . The computational model simulates our three-layers vertical test vehicle, where an epitaxial InGaAs channel deposited by MOVPE is used. The cylindrical channel is 280-nm-long, 45 nm in diameter and is surrounded by three Si-gates of 50 nm, spaced apart by 30 nm SiO2. The ONO gate stack is 12-nm-thick. Ti and highly doped Si are used as drain and source contact, respectively. Simulations focus on electron/hole transport through different materials and Schottky junctions. The following aspects are also considered: 1) [In] gradient close to the junctions, as shown by TEM-EDS mapping, 2) different channel lengths and contact areas with junctions, as evidenced by TEM, 3) different doping configurations to emulate Si diffusion from the source into the channel, as expected to happen due to high temperature InGaAs deposition. Simulations successfully explained the effect of [In] drift close to the Ti drain side, leading to resistance and ID-VD shape variations as observed in our electrical measurements. Rectifying behavior is observed when InGaAs, with low [In], is in contact with Ti, resulting in high series resistance and asymmetrical ID-VD. On the other hand, Si-doping into the InGaAs can cause high level of off current, as measured in our devices. Contact and variability issues can be mitigated by the choice of proper drain materials and doping close to the junctions. The simulations also provide design guidelines to improve current conduction in our 3-D NAND memories. References: : E. Capogreco, et al., IEDM 2015, p. 40
Authors : Fares Chouchane, Bassem Salem, Guillaume Gay, Mickael Martin, Sandrine Arnaud, Erwine Pargon, Franck Bassani, Sébastien Labau, Sylvain David, Reynald Alcotte, Jérémy Moeyaert, and Thierry Baron
Affiliations : Univ. Grenoble Alpes, LTM, F-38000 Grenoble, France CNRS, LTM, F-38000 Grenoble, France
Resume : FinFETs have emerged as a cornerstone of ultimately scaled devices. By improving the electrostatic gating, they allow to improve the subthreshold slope (SS) and to overcome the short-channel effects (SCE). In the other hand, InGaAs is establishing itself as a very promising high-mobility n-channel material that permits to restrict the power consumption issue in advanced Integrated Circuits (ICs). The fins definition is a key step of the development of FinFETs especially in the case of ultimately scaled dimensions where the slightest details are critical for achieving high performance. In this work, we present the ICP-RIE patterning of sub-10 nm InGaAs fins, grown on silicon substrate, using BCl3/N2 and BCl3/SiCl4/N2 chemistries. A systematic study of the InGaAs etching process has been carried out and the effects of the different experimental conditions on the etching kinetics and quality have been revealed. The fins have been observed by Focused Ion Beam Scanning Transmission Electron Microscopy (FIB-STEM) and the sidewalls roughness and the chemical composition of the surface have been analyzed respectively by AFM using a homemade setup where the sample is tilted to allow the tip to scan the sidewalls and X-ray Photoelectron Spectroscopy (XPS). The optimized results depict sub-10 nm width fins with smooth (LER≤2 nm) and almost vertical (>80°) sidewalls. These results open the door to sub-10nm width InGaAs FinFETs on silicon.  R. Deshmukh, A. Khanzode, S. Kakde, and N. Shah, “Compairing FinFETs: SOI Vs Bulk: Process variability, process cost, and device performance,” in 2015 International Conference on Computer, Communication and Control (IC4), 2015, pp. 1–4.  J. A. del Alamo, D. A. Antoniadis, J. Lin, W. Lu, A. Vardi, and X. Zhao, “III-V MOSFETs for Future CMOS,” in 2015 IEEE Compound Semiconductor Integrated Circuit Symposium (CSICS), 2015, pp. 1–4.
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Functional Oxides : J. Fompeyrine
Authors : G. Saint-Girons1, S. Cueff1, B. Meunier1, R. Bachelet1, J. Penuelas1, R. Orobtchouk1, P. Rojo-Romeo1, B. Vilquin1, P. Regreny1, G. Grenet1, L. Largeau2, G. Agnus3, V. Pillard3, D. Le Bourdais3, P. Lecoeur3, P. Castera4, A. Rosa4, A.M. Gutierrez4, T. Angelova4, A. Griol4, P. Sanchis4, S. Abel5, J. Fompeyrine5
Affiliations : 1 Institut des Nanotechnologies de Lyon (INL), CNRS UMR5270, Ecole Centrale de Lyon, 36, avenue G. de Collongue. 69134 Ecully Cedex - France 2 LPN/UPR20-CNRS, route de Nozay, 91460 Marcoussis, France 3 Université Paris-Sud, Institut d'Electronique Fondamentale, Bât. 220, 91405 Orsay cedex, France 4 Universitat Politècnica de València. I. U. I. Centro de Tecnología Nanofotónica Edificio 8F | Planta 2, Camino de Vera, s/n, 46022 Valencia – Spain 5 IBM Research—Zurich, 8803 Rüschlikon, Switzerland
Resume : The diversification of materials in micro-optoelectronic devices is a key issue to enable further progress in this field. The monolithic heterogeneous integration of new materials on silicon, and more generally the combination on the same wafer of materials having different physic al properties is an important challenge. In the photonic field, integration of functional oxides on semiconductor platforms such as III-V or Si would open tremendous perspectives. In particular, ferroelectric oxides such as BaTiO3 (BTO) and Pb(Zr,Ti)O3 (PZT) present optical properties liable to add flexibility, agility and reconfigurability in integrated photonic systems. In this context, we will show in this contribution how epitaxy can be used to grow crystalline oxides on silicon and III-V platforms. We will in particular show that the specific properties of these heterogeneous epitaxial systems can be used for the monolithic integration of III-V based heterostructures on SrTiO3-templated Si substrates. We will also detail some ongoing works showing how oxide/semiconductor heterostructures can be used to develop new functionalities for integrated photonics, such as high-speed modulators integrated on SOI platforms (SITOGA FP7 project) and tunable emitters and non-volatile switches based on oxide/GaAs heterostructures. This work was partly founded by European Commission: project FP7-ICT-2013-11-619456 SITOGA.
Authors : Johanna Nordlander, Marilyne Sousa, Felix Eltes, Eamon O’Connor, Daniele Caimi, Lukas Czornomaz, Bert J. Offrein, Jean Fompeyrine, Stefan Abel
Affiliations : IBM Research GmbH, Säumerstrasse 4, CH-8803 Rüschlikon, Switzerland
Resume : Optical modulators based on Pockels effect are key components of today’s long range optical communication networks. In recent years, Silicon photonic integrated circuit (Si-PIC) became the technology of choice for short range optical connections. However, using the Pockels effect is not possible in Si-PIC: silicon does not exhibit any Pockels effect, and attempts to integrate nonlinear materials with silicon have been cumbersome. We recently reported on a novel solution to integrate barium titanate (BTO) thin films with strong Pockels coefficients of ~150pm/V onto silicon . Waveguides having low propagation losses were also fabricated, so that integrated devices could be obtained, including ring resonators with quality factors of 20’000. In this contribution, we will report on the presence of charges in the dielectric layers building the waveguide, and on their influence upon the electro-optical performance of the devices. Different layer stacks are compared, with and without silicon being present in the waveguide. The role of a thin alumina bonding layer is also highlighted. It can act as a source of charges that influence the distribution of the electric field across the device, as well as its overlap with the optical mode. We will conclude by presenting an approach that enable to unambiguously observe Pockels effect in BTO-based ring-resonators. Our results represent a major step to fully exploit the potential of combining novel materials such as ferroelectric oxides with silicon photonics, in order to enable new integrated optical functionalities.  Abel, S. et al. Nat. Commun. 4, 1671 (2013)  Eltes, F. et al., submitted to ACS Photonics (2016)  Abel, S. et al. J. Light. Technol. 34, 01–6 (2016)
Authors : Min-Hsiang Mark Hsu1,2, Marianna Pantouvaki1, Clement Merckling1, Salim El Kazzi1, Joris Van Campenhout1, Philippe Absil1 & Dries Van Thourhout2,3
Affiliations : 1 IMEC, Kapeldreef 75, 3001, Leuven, Belgium 2Photonics Research Group, INTEC, Ghent University –imec, Ghent, 9000 Belgium 3Center for Nano- and Biophotonics (NB-Photonics), Ghent University, Ghent 9000,
Resume : The recent progress of electro-optical (EO) components integrated on Silicon-On-Insulator substrates is very promising for high-efficiency, high-bandwidth photonics applications. Ferroelectric BaTiO3 (BTO) shows excellent EO performance, therefore attracting interest for the fabrication of compact optical switching devices . However, achieving efficient devices is still challenging owing to one of the fundamental bottlenecks: Control of BTO orientations. In this work, we investigate how to control the BTO domain orientation and how the domain orientation influences the EO properties of the molecular-beam-epitaxial (MBE) BTO on SrTiO3(STO)-buffered Si(001) substrate. We found that changing STO thickness and post-growth annealing can result in out-of-plane (OOP) or in-plane (IP) BTO orientation according to x-ray diffraction (XRD) measurements. The orientation dependency of the EO phenomenon is characterized by bias-dependent spectroscopic ellipsometry. We demonstrate that, due to the different component strengths in the BTO Pockels tensor, aligning an external electric field vertically to the BTO orientation improves the EO efficiency in BTO. When applying an external OOP electric field, the IP 100nm BTO on Si shows effective Pockels coefficient around 35pm/V, which is comparable with LiNbO3. In addition, EO behaviors of the BTO prepared by different growth conditions will also be benchmarked with previous studies.
Authors : C. M. Orfanidou1, C. N. Mihailescu1&2, V. H. Mai3, V. S. Nguyen4, O. Schneegans4, G. Stan5 and J. Giapintzakis1
Affiliations : 1Nanotechnology Research Center and Department of Mechanical and Manufacturing Engineering, University of Cyprus, 75 Kallipoleos Avenue, PO Box 20537, 1678 Nicosia, Cyprus; 2National Institute for Laser, Plasma and Radiation Physics, 409 Atomistilor Street, PO Box MG-36, 077125 Magurele, Romania; 3CEA-LIST, Gif Sur Yvette, France; 4Laboratoire de Génie Électrique de Paris, CNRS, UPMC Paris-Sud Univ., Supélec, Gif-sur-Yvette, France; 5National Institute of Materials Physics, RO-077125 Magurele, Romania
Resume : LixCoO2 is a very well known material as it has been used as a cathode material in rechargeable Li–ion batteries during the last decades. Recently, resistive switching (RS) phenomena have been reported for polycrystalline LixCoO2 thin films grown on highly doped silicon wafers using conducting probe atomic force microscopy [1,2]. We have fabricated metal-insulator-metal (MIM) devices based on LixCoO2 thin films grown by pulsed laser deposition on p++ Si (111) and used two-probe I-V measurements to investigate the RS behavior of the devices. In this presentation, we will present recent results concerning the effect of SiO2- and LixCoO2-layer thickness on the RS behavior of the MIM devices. In addition, we will discuss plausible explanations for the observed phenomena and correlate them with the mechanism we have proposed in . Unraveling the mechanism governing these RS phenomena could lead to the usage of LixCoO2 thin films in Si-based technological applications such as resistive random access memories (RRAM) and neuromorphic systems.  A. Moradpour, O. Schneegans, S. Franger, A. Revcolevschi, R. Salot, P. Auban-Senzier, C. Pasquier, E. Svoukis, J. Giapintzakis, O, Dragos, V. C. Ciomaga, P. Chrétien, Adv. Mater. 23, 4141-4145 (2011)  V.H. Mai, A. Moradpour, P. Auban Senzier, C. Pasquier, K. Wang, M.J. Rozenberg, J. Giapintzakis, C.N. Mihailescu, C.M. Orfanidou, E. Svoukis, A. Breza, Ch. B. Lioutas, S. Franger, A. Revcolevschi, T. Maroutian, P. Lecoeur, P. Aubert, G. Agnus, R. Salot, P.A. Albouy, R. Weil, D. Alamarguy, K. March, F. Jomard, P. Chrétien, O. Schneegans, Sci. Rep. 5, 7761 (2015)
Authors : M. A. Fazio(1), M. Perani(1), N. Brinkmann(2), B. Terheiden(2), D. Cavalcoli(1)
Affiliations : (1) Department of Physics and Astronomy, University of Bologna, Italy; (2) Department of Physics, University of Konstanz, Germany.
Resume : During the last decades, silicon oxy-nitride (SiOxNy) has been a deeply investigated material, since it can be employed in different areas, for its qualities and low-cost production. Its great electrical and luminescence properties mark SiOxNy as one of the most suitable materials for thin-films transistors and LED applications, respectively [1, 2]. Due to their high conductivity and suitable optical gap, nanocrystalline and amorphous SiOxNy thin films are two of the best candidates in Silicon HeteroJunction (SHJ) solar cells, as substitutes of a-Si:H in the heteroemitter stack [3, 4]. For their highly disordered and multiphase nature, SiOxNy thin layers transport properties are still debated in literature. The present contribution aims to study conduction mechanisms at the nanoscale in these thin films, focusing on the role of the nanocrystals and deposition parameters on the nanoscale electrical properties. Local conductive properties at the nanoscale have been investigated using conductive-Atomic Force Microscopy (c-AFM) mapping and local current-voltage characteristics. Our results showed that different oxygen contents and annealing process times affect sample properties, causing changes in crystallinity fraction and in electrical transport. The investigation of current flow in such highly disordered materials could help clarify their electrical transport properties, providing information on the best deposition parameters to obtain suitable materials for SHJ solar cells application.  S. Hwang et al, J. Korean Phys. Soc. 51 (2007): 1096  R.J. Xie et al, Sci.Technol.Adv. Mater. 8, 7 (2007): 588  N. Brinkmann et al, Sol. Energ. Mat. Sol. C. 108 (2013): 180  M. Perani et al, J. Phys. Chem. C 119 (2015): 13907
Plasmonics and Optoelectronics : I. A. Fischer
Authors : Jaime Gomez Rivas
Affiliations : Dutch Institute for Fundamental Energy Research DIFFER, and Eindhoven University of Technology.
Resume : Optical illumination of semiconductors leads to photoinduced doping. When the illumination is local and intense, the semiconductor behaves as a conductor at THz frequencies. We have used this concept to demonstrate experimentally the photo-excitation of THz localized surface plasmon polaritons (LSPPs) in flat semiconductor layers. This demonstration is realized by a patterned optical excitation of free charge carriers in thin semiconductor films using a spatial light modulator, which enables full spatial and temporal control of plasmonic resonances without the need of physically structuring the sample. This approach is also used to excite capacitively and inductively coupled LSPPs in loaded plasmonic resonators. Plasmonic resonances on structured conductors are characterized by localized complex electromagnetic fields that we can fully characterize with subwavelength photoconductive antennas and that can be used to enhance the performance of spectroscopies and sensors. We also propose the spatially structured photoinduced doping of semiconductors to dynamically generate plasmonic waveguides and circuits. Structured illumination also enables active beaming of THz radiation with planar structures and the realization of active metasurfaces.
Authors : J. Frigerio (1), A. Ballabio (1), E. Sakat (2), M. Bollani (1), R. Milazzo (3), G. Pellegrini (2), L. Maiolo (4), A. Minotti (4), M. Virgilio (5), M. P. Fischer (6), A. Grupp (6) , K. Gallacher (7), L. Baldassarre (8), V. Giliberti (8), E. Napolitani (3), A. Pecora (4), D.J. Paul (7), D. Brida (6), M. Ortolani (8), P. Biagioni (2), G. Isella (1)
Affiliations : (1) L-NESS, Dipartimento di Fisica, Politecnico di Milano, Polo Territoriale di Como, Via Anzani 42, 22100, Como, Italy; (2) Dipartimento di Fisica, Politecnico di Milano, Piazza Leonardo da Vinci 30, 20100 Milan, Italy; (3) Dipartimento di Fisica e Astronomia, Universita di Padova and CNR-IMM MATIS, Via Marzolo 8, I-35131 Padova, Italy; (4) 1 IMM-CNR, Via del Fosso del Cavaliere 100, 00133 Roma, Italy; (5) Dipartimento di Fisica ”E. Fermi”, Università di Pisa, Largo Pontecorvo 3, I-56127 Pisa, Italy; (6) Department of Physics and Center for Applied Photonics, University of Konstanz, D-78457 Konstanz, Germany; (7) School of Engineering, University of Glasgow, Rankine Building, Oakfield Avenue, Glasgow G12 8LT, United Kingdom; (8) Dipartimento di Fisica, Sapienza Universita di Roma, Piazzale Aldo Moro 5, I-00185 Rome, Italy
Resume : Heavily-doped semiconductor thin films are very promising for application in plasmonics devices at mid-infrared wavelengths because the real part of their dielectric function is negative and broadly tunable in this wavelength range. In this work we investigate heavily n-type doped germanium epilayers on silicon using infrared spectroscopy, first principle calculations, pump-probe spectroscopy and DC electrical transport measurements to determine the relation between the plasma edge and the carrier density and to quantify the mid-infrared plasmon losses. We demonstrate that the screened plasma frequency can be tuned up to 2000 cm-1 (corresponding to a doping of about 9 ∙ 1019 cm-3) and that the electron scattering rate is dominated by scattering from non-polar optical phonons and with charged impurities. We also found a weak dependence of the losses and the tunability on the crystal defect density, temperature, inactivated dopant density and the optical pump wavelength in the near infrared. Our results suggest that plasmon decay times in the picosecond range can be obtained in Ge at room temperature. In order to assess the potential performance of our approach for applications, we have produced on-chip Ge nano-antennas by lithography and reactive ion etching and demonstrated a strong signal enhancement for the molecules located in the antenna hot spots. These results pave the way towards the low-cost integration of plasmonic sensing platforms into the existing silicon foundry technologies. The research leading to these results has received funding from the European Union’s Seventh Framework Programme under grant agreement no. 613055.
Authors : S. Prucnal1, Y. Berencén1, V. Heera1, M. Voelskow1, Y. Yuan1, M. Wang1, V. Poddar1, G. P. Mazur2, M. Grzybowski2, M. Zgirski2, M. Sawicki2, R. Hübner1, S. Zhou1, W. Skorupa1
Affiliations : 1 Institute of Ion Beam Physics and Materials Research, Helmholtz-Zentrum Dresden-Rossendorf, Germany 2 Institute of Physics, Polish Academy of Science, Warsaw, Poland
Resume : Independent of the type of doping, it is challenging to achieve in semiconductors an effective carrier concentration much above 10^20 /cm3. On the other hand, the successful realization of defect free n-type and p-type ultra-doped Ge layers will enable a range of devices from sensors to quantum computers. In the case of conventional doping techniques (using equilibrium processing) the maximum carrier concentration is limited by the out-diffusion of dopants, a relatively low solid solubility limit, clustering and self-compensation processes. To overcome such limitations we have utilised strong nonequilibrium process consisting of an ion beam implantation to introduce dopants into Ge and rear-side millisecond range flash lamp annealing (FLA) for recrystallization of implanted layer and dopant activation. In contrast to conventional annealing procedures, rear-side FLA leads to full recrystallization of Ge and dopant activation independent of the pre-treatment. The maximum carrier concentration is well above 10^20 /cm3 for n-type and above 10^21 /cm3 for p-type dopants. The so-fabricated n-type Ge can be used in the field of mid-infrared plasmonics which has not been accessible by group-IV semiconductors. Single crystalline n-type Ge with carrier concentrations as high as 2.2×10^20 /cm3 displays a room-temperature plasma frequency above 1850 /cm1 (?=5.4 ?m), which is the highest value ever reported for n-type Ge. In the case of Ga implanted Ge the maximum effective carrier concentration measured at 3K is 1.1×10^21 /cm3 which is two times higher than the solid solubility limit of Ga in Ge. Our p-type Ge is defect and cluster free and shows the superconductivity at Tc = 0.95 K. These results base on the successful combination of ion beam implantation followed by the novel approach consisting of millisecond range rear-FLA. This work has been partially supported by the EU 7th Framework Programme ?EAgLE? (REGPOT-CT-2013-316014).
Authors : L. Augel, I. A. Fischer, S. M. Bailer, S. Bechler, K. Kostecki, J. Schulze
Affiliations : University of Stuttgart, Institute of Semiconductor Engineering, Germany; University of Stuttgart, Institute of Interfacial Process Engineering and Plasma Technology, Germany;
Resume : There is a growing need for integrated biosensors that can be directly interfaced with signal conditioning circuits as well as wireless communication systems for applications in assisted living, medical diagnostics and process diagnostics (Industry 4.0). Plasmonic oscillations in metallic nanostructures like nanoantennas or nanohole arrays are highly sensitive to changes in their dielectric environment and, thus, have proven to be able to detect smallest amounts of substances in optical biosensing applications. However, external detection units for signal evaluation are typically bulky. Here, we present vertically grown Ge-on-Si photodetector layers in combination with Al nanohole arrays structured into the top metallization. The structures were fabricated using a complementary metal oxide semiconductor (CMOS)-compatible process. We present results in the photoresponse before and after surface functionalization with immunoglobin G and subsequent application of antibody A/G. The change in photoresponse in our system is the result of an interplay of the nanohole array with waveguide structures in our semiconductor heterostructures and we discuss how this interplay can be optimized to boost sensitivity and enable integrated biosensing.
Authors : Maximilian Bettenhausen, Bernd Witzigmann, Subhajit Guha, Marcin Kazmierczak, Thomas Schroeder
Affiliations : Computational Electronics and Photonics Group and CINSaT, University of Kassel Germany; Computational Electronics and Photonics Group and CINSaT, University of Kassel Germany; IHP Frankfurt (Oder), Germany; IHP Frankfurt (Oder), Germany; IHP Frankfurt (Oder), Germany;
Resume : Plasmonic antennas have gained large interest for various applications such as bio sensing or optical communication systems. Doped semiconductors show plasmonic behavior in the terahertz frequency regime, and can replace metals as plasmonic material. As a special feature, the plasma frequency of semiconductors is a function of doping concentration, and hence a tunable parameter. Antennas based on metals show a skin depth of only a few tens of nanometers in the RF and THz frequency regime, and their analysis can be done based on surface waves. This is due to the large negative real part of the dielectric function in this frequency range. Doped semiconductors are able to support surface waves in the THz regime, too. However, dependent on the doping level, the skin depth can be as large as the antenna thickness, and the surface wave analysis is not valid any more. To investigate the behavior of different materials of plasmonic antennas, we carry out numerical simulations of the electromagnetic field. As example, variations of the slab length of gold and germanium slab antennas with different doping are investigated. The results based on a full numerical solution of Maxwell’s Equations and the dispersion relation of the materials is calculated with a Drude model. Characteristic antenna properties such as resonance frequency of gold slab antennas in comparison to doped germanium slab antennas will be presented and advantages and disadvantages of both materials will be discussed. It is shown that the antenna resonance frequency can be tuned by doping concentration, and compact antennas can be built. Full wave effects such as skin depth and field confinement are shown.
More than Moore II: Spin-based Devices and Magnetism : tbd
Authors : T.F Watson, E. Kawakami, D. R. Ward, P. Scarlino, Z. Ramlakhan, M. Veldhorst , D. E. Savage, M. G. Lagally, M. Friesen, S. N. Coppersmith, M. A. Eriksson, and L. M. K. Vandersypen
Affiliations : T.F Watson; E. Kawakami; P. Scarlino; Z. Ramlakhan; M. Veldhorst; L. M. K. Vandersypen QuTech and Kavli Institute of Nanoscience, TU Delft, Lorentzweg 1, 2628 CJ Delft, The Netherlands D. R. Ward; D. E. Savage; M. G. Lagally; M. Friesen; S. N. Coppersmith; M. A. Eriksson Department of Physics, University of Wisconsin-Madison, Madison, WI 53706, USA
Resume : Electron spins bound to quantum dots are promising qubits for quantum information due to their long coherence times and potential for scalability. Group IV materials such as silicon are particularly relevant for hosting electron spin qubits due to their low abundance of nuclear spins which causes decoherence. Furthermore, these materials can be isotopically purified to have zero nuclear spin leading to orders of magnitude increase in coherence times  . Recently, we have demonstrated the all-electrical coherent control of a single electron spin bound to a natural Si/SiGe quantum dot by electric dipole spin resonance (EDSR) in the presence of a magnetic field gradient achieving gate fidelities of ~ 99% [2,3] . The next step in these devices is to perform a two qubit gate by controlling the exchange interaction between two electron spins that have different Zeeman energies due to nearby micromagnets [4,5]. Here, we demonstrate the independent sequential readout and coherent control of two coupled electron spins in a Si/SiGe double quantum dot with resonance frequencies separated by ~1GHz. We report on recent progress in implementing a two qubit gate in this system.  A. M. Tyryshkin et al., Nature materials 11, 143 (2012)  E. Kawakami et al., Nature Nanotechnology 9, 666 (2014)  E. Kawakami et al., arXiv:1602.08334 (2016)  T. Meunier et al., Physical Review B 83, 121403 (2011)  M. Veldhorst et al., Nature 526, 410 (2015)
Authors : Li-Te Chang1,2, Inga Anita Fischer2, Jianshi Tang1,3, Chiu-Yen Wang4, Guoqiang Yu1, Yabin Fan1, Koichi Murata1, Tianxiao Nie1, Michael Oehme2, Kang L. Wang1 and Jörg Schulze2
Affiliations : 1: Device Research Laboratory, Department of Electrical Engineering, University of California, Los Angeles, California, 90095, USA 2: Institut für Halbleitertechnik (IHT), Universität Stuttgart, Pfaffenwaldring 47, Stuttgart, 70569, Germany 3: Present address: IBM Thomas J. Watson Research Center, Yorktown Heights, NY 10598, USA 4: Department of Materials Science and Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan 10607, Republic of China
Resume : Spin transport in a semiconductor-based two-dimensional electron gas (2DEG) system has been attractive in spintronics for more than ten years. The inherent advantages of high-mobility channel and enhanced spin-orbital interaction promise for a long spin diffusion length and efficient spin manipulation, which are essential for spintronics devices application. However, the difficulty of making high-quality ferromagnetic (FM) contacts to the buried 2DEG channel in the heterostructure systems limits the potential developments in functional devices. We report on the experimental demonstration of electrical detection of spin transport in a high-mobility 2DEG system using FM Mn-germanosilicide (Mn(Si0.7Ge0.3)x) end contacts, which is the first report of spin injection and detection in the 2DEG confined in a Si/SiGe modulation doped quantum well structure (MODQW). The extracted spin diffusion length and lifetime are l_sf = 4.5 um and tau_s=16 ns at 1.9 K, respectively, which is consistent with the fact that spin lifetime is strongly dependent on the impurity density. Our results provide a promising approach for spin injection into 2DEG system in the Si-based MODQW, which may lead to innovative spintronic applications such as spin-based transistor, logic, and memory devices.
Authors : W. Koczorowski, S. El-Ahmar, P. Kuświk, M. Przychodnia, M. Szybowicz, A. Poźniak, W. Strupiński, R. Czajka
Affiliations : Institute of Physics, Poznan University of Technology, Piotrowo 3, 60-965 Poznań, Poland, Centre of Advanced Technologies, Adam Mickiewicz University, ul. Umultowska 89C, 61-614 Poznań, Poland; Institute of Physics, Poznan University of Technology, Piotrowo 3, 60-965 Poznań, Poland; Institute of Molecular Physics, Polish Academy of Sciences, Smoluchowskiego 17, 60-179 Poznań, Poland, Centre of Advanced Technologies, Adam Mickiewicz University, ul. Umultowska 89C, 61-614 Poznań, Poland; Institute of Physics, Poznan University of Technology, Piotrowo 3, 60-965 Poznań, Poland; Institute of Physics, Poznan University of Technology, Piotrowo 3, 60-965 Poznań, Poland; Institute of Physics, Poznan University of Technology, Piotrowo 3, 60-965 Poznań, Poland; Institute of Electronics Materials Technology, Wólczynska 13, 01-919 Warszawa, Poland; Institute of Physics, Poznan University of Technology, Piotrowo 3, 60-965 Poznań, Poland;
Resume : Electronic features of the Graphene (G), like the extremely high carrier mobility and lateral conduction are the most spectacular ones . The Chemical Vapor Deposition (CVD) is frequently used to G growth on the metallic substrates . Alternatively the G layer could be produced directly on the insulating substrate (SiC(0001)) using both vacuum decomposition , or CVD growth technique . In this presentation the novel procedure for G-based electronic devices fabrication by means of combined photolithography, Ar+ ion sputtering and DC magnetron metal evaporation processes will be presented. Initially, the SiC(0001) substrate entirely covered by the G layer has been used. The proposed solution prevents against semiconductor surface oxidation and therefore is much more compatible with the standard semiconductor technology. The obtained results of Raman spectra, electrical and Hall measurements of the fabricated devices (the Hall sensors and structures enabling the “transfer line” measurements) demonstrate similar properties as fabricated by means of the early used procedures. In addition the novel magnetic field sensor based on the G will be presented . Acknowledgment: Polish Ministry of Science and Higher Education is acknowledged for the financial support under project No 006/62/DSPB/0216. References:  A.H. Castro Neto, et al. Rev. Mod. Phys. 81 109 (2009).  T. Iwasaki, et al., Nano Lett. 11 79 (2011).  Y.Q. Wu, et al. Appl. Phys. Lett. 92 092102 (2008).  W. Strupiński, et al. Nano Lett. 11 1786 (2011).  S. El-Ahmar, et al. Polish Patent Office, Patent Application No. P.416781, (2016).
Authors : Seiichi Miyazaki, Yusuke Mitsuyuki, Taiga Kawase, Mitsuhisa Ikeda, and Katsunori Makihara
Affiliations : Graduate School of Engineering Nagoya University Furo-cho, Chikusa-ku, Nagoya, 464-8603, Japan
Resume : Magnetic nanodots (NDs) showing a high anisotropy have received much attention because of their potential application to magnetoelectronic devices. So far, we have reported a spontaneous formation of L10-ordered FePt dots with an areal density as high as ~1E11cm-2 by remote H2-plasma (H2-RP) exposure of Pt/Fe bilayers on ultrathin SiO2/c-Si without external heating and demonstrated a unique magnetic-field dependent electron transport through individual FePt dots/ultrathin SiO2 by means of a CoPtCr-coated magnetic tip of atomic force microscopy (AFM) in a contact mode. In this work, based on size-dependent magnetic properties of FePt nanodots, we have designed and fabricated double stack FePt NDs with ultrathin internal SiO2 and characterized their magnetoelectronic transport properties as a function of external maginetic field at room temperature (RT). FePt NDs with an areal density of ~4.5E11cm-2, an average dot size of ~5.0nm and a RT coercivity as small as 0.5kOe were formed firstly by H2-RP exposure of ultrathin Pt/Fe bilayers on 2nm-thick thermally-grown SiO2 layer/Si(100) without external heating. And then, very uniform coverage of the FePt NDs with a 2nm-thick SiO2 layer by a PVD method and subsequent formation of Pt/Fe bilayers were followed by H2-RP exposure for the spontaneous formation of FePt nanodots with an areal density of ~2.5E11cm-2, an average dot size of ~8.0nm and a RT coercivity of ~2.5kOe in a similar way to the 1st formation of FePt NDs. After that, Al back contact was formed to measure the electron transport through the double stack FePt NDs on ultrathin SiO2. I-V characteristics of the double stacked FePt NDs as a function of magnetic field were measured by using non-magnetic Ph-coated AFM Tip at room temperature. With an increase in magnetic field from 1.5 to 2.5kOe in the direction normal to the sample surface, the current level is increased significantly by over one order of magnitude. Then no further change in the current level was detectable by magnetic field application of 4.5kOe. In addition, such a high conductive state obtained at 2.5kOe remains almost unchanged even in 24hr after removal of external magnetic field, which implies stable magnetization of the double stack FePt NDs. Notice that, when the magnetic field of 0.5kOe was applied in the opposite direction to the 1st magnetization, the current level was decreased markedly to the initial low current level. With further increase in the magnetic field from 1.5 to 2.5kOe, the switching to the high conductive state happened. The observed resistive switching in the double stack FePt NDs can be interpreted in terms of a change in the magnetization polarity between staked FePt NDs with different coercivities.
Authors : Daniel Thomas(1); Etienne Puyoo(1); Martine Le Berre(1); Liviu Militaru(1); Siddardha Koneti(2); Annie Malchère(2); Lucian Roiban(2); Andrei Sabac(1); David Albertini(1); Francis Calmon(1)
Affiliations : (1) Institut des Nanotechnologies de Lyon, INSA-Lyon, UMR CNRS 5270, Université de Lyon, 7 avenue Jean Capelle, 69621 Villeurbanne Cedex, France; (2) MATEIS, INSA-Lyon, UMR 5510, CNRS 5270, Université de Lyon, 7 avenue Jean Capelle, 69621 Villeurbanne Cedex, France
Resume : Single electron transistors promise unrivaled efficiency, however the cost and difficulty associated with achieving stable room temperature operation have hindered their pathway to industry. Numerous novel techniques have been demonstrated showing room temperature operation, however many of these techniques require specialized fabrication techniques. Capitalizing on traditional UV lithography and the shadow edge evaporation technique provides a greater flexibility in both material choice and simplicity of fabrication and could provide an easier path to adoption. Profiting from these techniques, planar structures can be formed with incredibly high gap length vs. width aspect ratios, with direct tunnel barriers that are independent of any sticking layer materials that may be employed. Aluminum nanogap electrodes were fabricated using these techniques and were characterized by scanning electron microscopy. Gap sizes were found to be easily controlled via the deposition angle, with a minimum gap size of 6 nm. These gaps were then filled with an Al2O3 dielectric tunnel barrier as well as Pt nanoislands, both formed using the atomic layer deposition technique. TEM and AFM imaging confirmed the growth of size-controlled, well dispersed particles which reached sizes between 1.5 nm and 5 nm, before starting to aggregate. We observed an increase of the measured current after the introduction of Pt nanoparticles in the gap.
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