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2015 Fall

Materials for electronics and optoelectronic applications away from silicon.


Nitride semiconductors for high power and high frequency electronic devices

The symposium “Nitride semiconductors for high power and high frequency electronic devices “ focuses on nitride-based high power devices and challenges related to electronic transportation, energy efficiency, terahertz emission, and advanced substrates for such application. Physical properties of GaN make this wide-bandgap material very attractive for microelectronics, optoelectronics, and solar applications.

Today, it is well acknowledged that, thanks to its very high breakdown field, high saturation velocity, high electron mobility, and respectable thermal conductivity, GaN material is a revolution in the semiconductor sector. The deployment of nitride technologies is a key issue for Europe to strengthen its competitiveness while addressing societal challenges on transportation, energy efficiency, and renewable energy. Manufacturing capabilities have been limited by the compatibility of the wafer with silicon production environment: diameter, cost, handling, and material quality.

The scope of this Symposium covers the whole value chain of GaN-based devices i.e. from material & equipment to device makers, with a specific focus on advanced substrates and power devices as well as the creation of their production. The concept of this Symposium is to design the expected technological challenges for GaN-based electronics, such as:

  1. compatibility with silicon standard manufacturing device line: wafer damage or breaking issues due to wafer brittleness, stress, and non-standard carrier
  2. requirements for competitiveness: transition to 6” and 8” diameter, how to bring GaN material and technology to a level compatible with high volume manufacturing in terms of yield, robustness, and cost
  3. adequate device manufacturing: thermal management, high voltage, device manufacturing, and challenge of reliability (GaN defects, instability, growth temperature)
  4. GaN-based or GaN epi compatible substrates with high quality and performance in terms of defectivity, reliability, thickness, conductivity, manufacturability, diameter, and yield.

GaN has already been selected for LED and High Performance Solar Cell markets. This material is considered for CMOS nodes below 10 nm and is also particularly attractive for power applications in electronic devices operating at high temperatures, high power, very high frequencies and in a harsh environment. However, there are some barriers connected to GaN-based devices. The first one is the availability, as few GaN transistors are available in mass production. Competing manufacturers’ products are non-standard and there are no second-sources. Secondly the technology so far lacks maturity. An overall device performance and GaN material defect rates need improvement.


Hot topics to be covered by the symposium


  • Substrates for GaN based electronic devices
  • Epitaxy of GaN based structures for electronic applications
  • Progress in Schottky diodes based on GaN
  • Progress in HEMTs based on nitride semiconductors
  • Progress in terahertz devices based on nitride semiconductors


Tentative list of invited speakers


  • P. Guenard (Soitec) “GaN based Advanced Substrates for electronic applications”
  • M. Zając (Ammono) “Ammonothermally grown GaN substrates for electronic applications”
  • P. Coppens (ONSEMI) “GaN-on-Si MISHEMTs in the new 6" pilot line”
  • A. Torres (CEA LETI) “AlGaN/GaN HEMT on GaN-on-Si for power applications”
  • E. Galván (GPTech) “Electric and thermal specifications of GaN power devices used in photovoltaic applications”
  • R. Rodriguez (IUMA) “Numerical simulation and compact physical modeling of AlGaN/GaN power HEMTs”
  • T. Mrotzek (Plansee) “Composite materials for inverse heat sinks”
  • T. Sochacki (TopGaN) “Current status of the HVPE-GaN growth”
  • M. Iwinska (IWC PAN) “HVPE-GaN growth on Smart CutTM substrates”
  • M. Germain (EpiGaN) “GaN growth on Si for RF applications"

Tentative list of invited speakers


  • A. Piotrowska (IET, Poland)
  • T. Skotnicki (WUT, Poland)
  • T. Dietl (IP PAS, Poland)
  • R. Dwilinski (UW, Poland)
  • Z. Sitar (NCSU, USA)
  •  J. Freitas (NRL, USA)
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Authors : v. Dragoi*, N. Razek*, C. Fl?tgen*, R. Caulmilone**, P. Guenard**
Affiliations : *EV Group, Austria; **Soitec, France

Resume : Various wafer bonding processes were developed over time in order to accommodate specific needs in terms of applications. The types of interactions between two solid surfaces placed into contact involve molecular bonds (direct or fusion bonding), building of a bonding layer during process (anodic bonding), atom bonds (metal thermo-compression bonding), alloying (eutectic or TLP/intermetallic bonding), or gluing using glass paste material (glass frit bonding) or various polymer materials (adhesive bonding with UV or thermally cured polymers). Direct wafer bonding (named also fusion or molecular bonding) is often the process of choice for substrates manufacturing. In this process first the two substrates are placed into contact (usually at ambient conditions) in order to obtain the adhesion due to molecular bonds formed between the two substrates. As the adhesion occurred at room temperature is weak, a thermal annealing is needed as a source of energy to transform the weak room temperature bonds into strong covalent bonds. Thermal steps have a major influence on wafer bonding applicability not only due to the obvious reason that some materials exhibit a limited temperature to which can be exposed without degrading or oxidizing, but also due to the thermal expansion. The stress between the different materials would increase due to different thermal expansion with increasing the temperature. Being a material property, the thermal expansion cannot be avoided but by minimizing the

Growth II : Matthias Bickermann
Authors : M. Zając 1, R. Kucharski 1, A. Puchalski 1, J. Krupka 2
Affiliations : 1 Ammono S.A., Prusa 2, 00-493 Warsaw, Poland;2 Institute of Electronics and Microelectronics, Warsaw University of Technology, Koszykowa 75, 00-662 Warsaw, Poland

Resume : Highly resistive bulk GaN substrates are demanded for microwave electronics and electronic devices operating at high voltage (above 1000V). In this communication we show ammonothermal method of highly resistive GaN substrates manufacturing. It uses supercritical ammonia for dissolution of feedstock material and crystallization of GaN on native seeds due to convection-driven transport and supersaturation of the solution. We present two types of such material: 1) substrates of max. 2-inch diameter, in which oxygen donors are compensated by shallow Mg acceptors (type-I), 2) substrates doped with deep acceptors in form of transition metal ions (type-II). In these substrates the oxygen concentration was about 1x1018 cm-3. Both types of material show dielectric properties, with resistivity of at least 1011 Ωcm and outstanding crystallographic quality. This will enable an efficient production of high-power, high-frequency devices based on GaN homoepitaxy. Type-I 1-inch and 1.5-inch substrates were successfully used in fabrication of High Electron Mobility Transistors operating at frequency of 6 GHz [1]. [1] A. Taube et al, Physica Status Solidi (a), DOI: 10.1002/pssa.201431724. Acknowledgements: This work was partially supported by the PolHEMT Project under the Applied Research Programme of the National Centre for Research and Development, Contract Number PBS1/A3/9/2012 and European Space Agency PECS project “Low dislocation Gallium Nitride for space applications”, contract number 4000108320/13/NL/KML.

Authors : T. Sochacki [1,2], M. Amilusik [1,2], M. Fijalkowski [1], B. Lucznik [1,2], M. Iwinska [1], G. Kamler [1], R. Kucharski [3], I. Grzegory [1,2], M. Bockowski [1,2]
Affiliations : [1] Institute of High Pressure Physics PAS, Sokolowska 29/37, 01-142, Warsaw, Poland; [2] TopGaN Sp. z o.o., Sokolowska 29/37, 01-142, Warsaw, Poland; [3] Ammono S.A. Prusa 2, 00-493 Warsaw, Poland

Resume : It was shown that the ammonothermally grown GaN crystals (Am-GaN) can be successfully used as seeds for the Hydride Vapor Phase Epitaxy (HVPE). Crack-free and up to 2-mm-thick HVPE-GaN layers were obtained. Free-standing (F-S) HVPE-GaN crystals sliced from Am-GaN seeds show high structural as well as optical, electrical, and thermal qualities. Since the structural properties of the F-S HVPE-GaN crystals are not different from the excellent structural properties of the Am-GaN seeds, F-S HVPE-GaN can be successfully used as a seed for further HVPE-GaN growth. It is feasible to multiply the ammonothermally grown GaN by the HVPE technology. The F-S HVPE-GaN crystals can also be used as seeds for the ammonothermal growth. In this paper the state of the art of HVPE-GaN growth on Am-GaN seeds will be demonstrated. Particular attention will be paid to the growth rate and its influence on the structural quality and purity of the HVPE-GaN layers. New directions in the development of the HVPE-GaN growth will be presented. The main goal for today is to develop a method of doping by donors and acceptors. It seems that due to the high purity of the HVPE-GaN, the free carriers can be compensated at a very low level of doping. Thus, high-quality HVPE-GaN with a high resistivity should easily be obtained. On the other hand, high-quality HVPE-GaN with the free carrier concentration of the order of 5x1018 cm-3 should also be crystallized.

Epitaxy and Devices I : David Meyer
Authors : Marianne Germain
Affiliations : EpiGaN nv, Kempisceh Steenweg, 293, B-3500 Hasselt, Belgium

Resume : The key advantage of GaN-on-Si material resides in the possibility to develop III-N heterostructures on large diameter substrates, making this technology the most cost-efficient for electronic applications. Highly uniform, low bow, crack-free GaN-on-Si HEMTs structures on wafer diameters up to 200mm have been grown with specifications suited for high performance devices. The key material challenge, with larger and larger wafer diameter, remains the strain engineering in the hetero-epitaxial stack, especially when addressing high voltage operation (650V). Different buffer stacks are required depending also on the final applications (capacitive coupling, leakage current, breakdown voltage…). Higher performance devices are further enabled by the deposition of SiN passivation layer, in-situ grown by MOCVD. This in particular allows for the formation of 2DEG with a very thin (6nm) AlN binary barrier. These SiN/AlN/GaN structures grown on Si substrates exhibit very low sheet resistivity (< 300 Ohm/sq.). We will show latest results on 150 mm and 200mm wafer development for RF/mm wave applications, as well as for High Voltage (Vbkd> 1000V) applications.

Authors : E.Frayssinet1, J.Mohdad1, S.Latrach1,2, S.Chenot1, Y.Cordier1,*
Affiliations : 1. CRHEA-CNRS, rue B.Grégory, 06560, Valbonne, France. 2. LMON, Univ. Monastir, Av. de l’Environnement, 5000 Monastir, Tunisia.

Resume : In the present work AlGaN/GaN HEMTs have been grown by MOCVD with thin buffer layers on Si(111) substrates. Structures were grown with the same layer stack to check the influence of growth parameters. The growth conditions were kept unchanged for the SiN cap, the AlGaN/AlN barrier, the 0.2 µm AlN nucleation layer and the following 0.4 µm GaN buffer grown at low temperature to obtain a carbon rich resistive layer. The remaining part of the GaN buffer including the channel was grown using various conditions. The epilayers structural quality was assessed by XRD and by AFM which revealed some differences especially in case of excessive growth pressure or N/III ratio. CV measurements with a Mercury probe as well as on Schottky diodes revealed differences in the pinch-off regime of the 2DEG located at the AlN/GaN interface. Except in one case, the leakage current between isolated devices confirmed this trend. For the majority of theses structures, Hall effect produced sheet carrier densities of 1xE13/cm² and electron mobility between 1100 and 1400 cm²/V.s depending on the GaN channel growth conditions. The output and transfer characteristics (drain current, transconductance and leakage currents) of the transistors are in agreement with the previous electrical characterizations. Thanks to the combination of structural and electrical characterizations we are then able to determine the optimized growth conditions for such HEMT structures.

Authors : Tomasz Szymański, Mateusz Wośko, Bogdan Paszkiewicz, Regina Paszkiewicz
Affiliations : The Faculty of Microsystem Electronics and Photonics, Wrocaw University of Technology, Janiszewskiego 11/17, 50-372 Wroclaw, Poland

Resume : Due to the lack of large diameter and inexpensive GaN substrates, the growth of GaN-based multilayer structures is commonly carried out on sapphire or SiC. Another heterosubstrate widely used which comprises such properties as low price, availability of large diameters, good thermal and electrical conduction, is silicon. Application of Si substrates can also enable opportunity toward an integration with Si electronics. Along with benefits of using silicon as a substrate there comes many issues that were already attempted to be either eliminated or minimized. Those issues exist mainly due to large lattice mismatch between GaN and Si, and significant difference in thermal expansion coefficients of materials under discussion. Till now, most successful growth of GaN-based structures were performed on (111) oriented Si substrates. The cause of that is attributed to hexagonal like in-plane surface atom arrangement which is called three fold symmetry. Use of Si(111) substrates leads to a GaN c-axis oriented growth. Motivation of GaN growth on Si(11x) other than (111) is control of large spontaneous polarization fields oriented along the hexagonal c-axis that come from non-centrosymmetric nature of GaN compound and presence of polar faces in wurtzite structure. Additionally, one has to take into account that III nitrides are strong piezoelectrics materials, nature of which will intensely influence overall polarization field strength. GaN C-axis inclination from perpendicular direction in regard to substrate surface should reflect the angle between planes of (111) and (11x). In this work several approaches will be presented that lead to GaN growth on Si substrates of chosen orientation. MOVPE epitaxial growth was performed on 2'' Si(111), Si(112), Si(115) substrates simultaneously using a 3x2'' Close Coupled Showerhead MOCVD system. The results for various growth procedures applied will show uncoalesced and coalesced layers and discuss orientation of grown GaN-based multilayer structures. Also theoretical calculation of AlGaN/GaN 2DEG charge in dependence of C-axis inclination will be presented.

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Growth III : Ramon Collazo
Authors : M. Iwinska [1], M. Amilusik [1,2], M. Fijalkowski [1], T. Sochacki [1,2], B. Lucznik [1,2], A. Nowakowska-Siwinska [2], I.Grzegory [1], P.Guenard [3], R. Caulmilone [3], M. Seiss [4], T. Mrotzek [4], M. Bockowski [1,2]
Affiliations : [1] Institute of High Pressure Physics PAS, Sokolowska 29/37, 01-142 Warsaw, Poland; [2] TopGaN Sp z o.o., Sokolowska 29/37, 01-142 Warsaw, Poland; [3] Soitec, Parc Technologique des Fontaines, 38190 Bernin, France; [4] PLANSEE SE, 6600 Reutte, Austria

Resume : Smart Cut™ technology is based on transferring a very thin single crystalline layer from a substrate onto a different handler. This method is successfully used in case of silicon and one of the results is a Silicon-On-Insulator (SOI) engineered wafer. This technology enables fabrication of low-cost, large-area, and high-quality wafers. Currently, attention is drawn to obtaining substrates with a thin layer of gallium nitride for the purpose of GaN-based electronic and optoelectronic devices. Results of HVPE-GaN growth of GaN layers on Advanced Substrates prepared with Smart Cut™ technology will be presented. The substrates consist of handler material (Sapphire or Molybdenum), a bonding layer, and a transferred, about 200-nm-thick Ga-face GaN layer. An approach analogous to growth on MOCVD-GaN/Sapphire templates engaging a technique similar to Void Assisted Separation (VAS) was applied. It is possible to obtain high-quality and crack-free HVPE-GaN crystals on such templates. The process of self-lift-off together with an influence of nitridation time in such growth was analyzed in detail. HVPE crystallization runs performed on Advanced Substrates in different conditions will be discussed. Structural properties of layers obtained on photolitographically patterned Ti masks will be presented. Results of characterization by X-ray diffraction, scanning electron microscopy, defect selective etching, photo-etching, and secondary ion mass spectrometry of the grown HVPE-GaN crystals will be included. Finally, up to 1-mm-thick and crack-free layers together with their properties will be demonstrated.

Authors : M. Bickermann, C. Hartmann, A. Dittmar, F. Langhans, S. Kollowa, T. Schulz, M. Naumann, A. Kwasniewski, K. Irmscher, J. Wollweber
Affiliations : Leibniz Institute for Crystal Growth (IKZ) Berlin, Germany

Resume : Single-crystalline aluminum nitride (AlN) is a promising substrate material not only for AlGaN epilayers with high Al content, e.g. for solid-state deep-UV optoelectronics, but also for high temperature and high power applications. This presentation gives an overview of the status of AlN substrate preparation and discusses perspectives and challenges for GaN/AlGaN-based high power electronics. AlN bulk single crystals are grown by the physical vapor transport (PVT) method at temperatures well above 2000°C. Crystals of high structural perfection (dislocation densities < 10^4 cm^-2) can be grown using AlN single crystal wafers as seeds. However, proper control of the PVT growth process is made difficult due to gradual changes of the reactor materials caused by attack of gaseous Al and unintentional incorporation of impurities (O, C, Si) into the growing crystals during growth. The latter determine the electrical, thermal, and optical properties of bulk AlN substrates. In turn, these properties can be adjusted at least partially by providing proper growth conditions or by employing doping. We will present and discuss preparation of bulk AlN substrates for power electronics which are electrically semi-insulating even at temperatures beyond 1000°C, ones that provide weak n-type conductivity (n = 1.2 10^15 cm^-3, µ = 36.5 cm^2/Vs) at room temperature by Si doping, and ones that exhibit transmission in the deep-UV wavelength range (for optical applications).

Epitaxy and Devices II : Benjamin Damilano
Authors : R. Collazo[1], P. Reddy[1], B. Haidet[1], I. Bryan[1], Z. Bryan[1], F. Kaess[1], L. Hernandez-Balderrama[1], M. Bobea[1], J. Tweedie[2], R. Kirste[1,2], S. Mita[3], T. Sochacki[4], M. Bockowski[4], E. Kohn[1], and Z. Sitar[1]
Affiliations : [1] Department of Materials Science and Engineering, North Carolina State University, Raleigh, NC 27695-7919, USA; [2] Adroit Materials, Apex, NC 27539, USA; [3] HexaTech, Inc., 991 Aviation Pkwy, Suite 800, Morrisville, NC 27560, USA; [4] Institute of High Pressure Physics PAS, Sokolowska 29/37, 01-142 Warsaw, Poland

Resume : Based on Baliga’s FOM, GaN, AlN, and AlGaN-based Schottky diodes are expected to be superior to SiC by a factor of 6 to 200. Advances in native substrates have led to the possibility of vertical devices with low dislocation densities, thus approaching the materials’ ultimate performance. After effectively removing dislocations, new material challenges become apparent: epitaxy morphology on native substrates, point defect control, and surface manipulation. These influence the development of these switches as they determine: thickness and composition, carrier concentrations and mobility at the contact and drift layers, and Schottky barrier and its passivation. Onset of three main surface morphologies was found to depend on the substrate miscut with characteristic differences between AlN and GaN, as determined by surface kinetics. These differences become significant for AlGaN, determining composition and lateral uniformity. Point defect control leads to the achievement of the necessary high carrier concentrations in the back contacts while allowing for controllable low carrier concentrations in the drift layers; a carrier concentration of 2x1016 cm-3 with a mobility of 1100 cm2/Vs was obtained for GaN on sapphire. Homoepitaxial GaN on HVPE/ammonothermal GaN substrates shows a narrow PL DBX peak of 100 μeV, suggesting the higher quality of this material. Results on the performance and further limitations of Schottky diodes based on these materials achievements will be discussed.

Authors : P Kruszewski 1,2, J Jasinski 3, T Sochacki 1,2, M Bockowski 1,2, R Jachymek 2, P Prystawko 1,2, M Zajac 4, R Kucharski 4 and M Leszczynski 1,2
Affiliations : 1 Institute of High Pressure Physics UNIPRESS, Warsaw, Poland 2 Top-GaN Sp. z o.o., Warsaw, Poland 3 The Institute of Microelectronics and Optoelectronics, Warsaw Technical University, Poland 4 Ammono SA, Warsaw, Poland

Resume : In this study, we demonstrate high voltage Schottky barrier diodes grown on highly doped n-type GaN substrate (~1x1E19 cm-3) obtained by ammonothermal method. Such Ammono-GaN crystals are characterized by dislocations density as low as 1E4 cm-2. In our SBDs, thick GaN layers (~150 μm) grown by Hydride Vapor Phase Epitaxy (HVPE) growth technique on Ammono-GaN substrate reproduce this low dislocation density ensuring simultaneously high uniformity, purity and smoothness of GaN film. Moreover, our diodes have been designed in a vertical current flow config-uration, what should also significantly improve the current spreading in the structure leading to more efficient performance and lower power dissipation. First, prior to SBD device fabrication, the HVPE grown GaN layers have been examined elec-trically by means of Hall effect studies. Typically measured values of electron concentration and mo-bility for our structures were in range of 2-8x1E16 cm-3 and 1100-800 cm2/Vs, respectively. The aver-age HVPE-GaN resistivity was around 3x1E-1 Ω*cm. The electrical studies have shown the huge potential in such vertical GaN-based Schottky diodes with the breakdown voltage as high as 700 V and typically around 400 V. Additionally, our results are quite impressive regarding breakdown voltage when one can take into account the fact that there was no any edge termination in our structures such as field plates, guard rings or implantation.

Authors : Boris N. Feigelson, Jordan D. Greenlee, Travis J. Anderson, Jennifer K. Hite, Karl D. Hobart, Fritz J. Kub
Affiliations : Boris N. Feigelson US Naval Research Laboratory; Jordan D. Greenlee National Research Council; Travis J. Anderson US Naval Research Laboratory; Jennifer K. Hite US Naval Research Laboratory; Karl D. Hobart US Naval Research Laboratory; Fritz J. Kub US Naval Research Laboratory

Resume : P-type dopant implantation and activation adds additional complexity to the synthesis of p-type GaN. Advanced annealing processes, such as the Multicycle Rapid Thermal Annealing (MRTA) are required for Mg activation. The MRTA process consists of two separate, successive steps. Both steps are conducted at elevated nitrogen pressure of 25 atm. First, the implanted GaN is annealed conventionally at temperatures at which the capped GaN is stable on the order of 10’s of minutes. This step allows partial restoration of the GaN lattice damaged by implantation, preparing a more stable crystal structure for the next step. In the second step, the annealing temperature is repeatedly pulsed to temperatures above 1000˚ C, accumulating the time GaN is exposed to these high temperatures. In this paper, we introduce a modified MRTA process allowing the realization of a PIN diode using Mg implantation in GaN. The modified MRTA process includes additional step of conventional annealing after multiple rapid heating cycles. It is shown that this step is necessary to remove stresses and defects introduced by the rapid heating and cooling of the GaN. The new modified MRTA process consists of two conventional annealing steps 1 and 3, with the step 2 of rapid heating and cooling pulses in between, thus it is named as symmetrical multicycle rapid thermal annealing (SMRTA). The improvement in crystal quality provided by the SMRTA will be a key enabling step for future Mg-implanted devices.

Authors : V. Prozheeva 1, F. Tuomisto 1, H. Li 2, S. Keller 2, and U. K. Mishra 2
Affiliations : 1 Department of Applied Physics, Aalto University, P.O. Box 14100, FI-00076 AALTO, Finland; 2 Electrical and Computer Engineering Department, University of California, Santa Barbara, CA, USA

Resume : High electron mobility transistors (HEMTs) based on III-nitrides grant higher 2D electron gas (2DEG) densities due to polarization fields intrinsic to the wurtzite structure [1]. Recently investigations were directed from Ga-polar towards N-polar (Al,Ga,In)N heterostructures. The N-polar layout is advantageous for enhancement mode and highly scaled transistors [2, 3]. However, unoptimized N-polar HEMTs suffer from large-signal dispersion and are sensitive to light due to donorlike traps within the device structure [3]. The negative impact of the traps can be mitigated by implementing an elaborate design combined with Si doping. We present results obtained by positron annihilation spectroscopy in N-polar S.I. GaN/AlGaN:Si/AlGaN/GaN HEMTs with graded backbarrier design and different Si doping where the valence band is below the Fermi level. These data are compared to measurements of a simplified HEMT structure where traps formed at the S.I. GaN/AlGaN interface. As shown in [4], polar structures affect the spatial confinement of the positron state. A dramatic change in the positron trapping at the GaN/AlGaN interface takes place when the Si doping of the AlGaN layer is above 5e18 cm-3. Interestingly, no interface traps are detected with positrons in Ga-polar structures. [1] L. Bjaalie et al., New J. Phys. 16 (2014). [2] M. H. Wong et al., Semicond. Sci. Technol. 28 (2013). [3] S. Rajan et al., J. Appl. Phys. 102 (2007). [4] I. Makkonen et al., Phys. Rev. B 82 (2010).

Epitaxy and Devices III : Takashi Matsuoka
Authors : Jason Jones, Matthew Rosenberger, William King, Samuel Graham
Affiliations : Georgia Institute of Technology, Atlanta, USA, University of Illinois Urbana Champaign, Illinois, USA

Resume : AlGaN/GaN based High Electron Mobility Transistors (HEMTs) have recently been under intense research and are becoming attractive devices for high voltage and high-power applications at RF operating conditions. GaN is a wide band gap (~3.4 eV at room temperature) semiconductor with a promising combination of material properties including a high electric breakdown field, good electron mobility, high saturation velocity, relatively high thermal conductivity, and is stable at high operating temperatures; all of which contribute to making these devices very suitable for RF devices where high power and high frequency operation are needed. Development and fabrication of reliable AlGaN/GaN HEMTs has significantly advanced in recent years to enable the production of high quality, commercially available devices in a wide variety of high power and high frequency applications. To further study these devices, however, it is important to investigate the reliability physics associated with AlGaN/GaN HEMTs – especially under the transient operating regime where these devices are predicted to excel over existing technologies. In this work, we present finite element simulation results of the transient temperature, stress, and deformation response of an AlGaN/GaN HEMT built on SiC substrates. The modeling technique involves a small-scale electro-thermal model coupled to a large-scale mechanics model to determine the resulting stress distribution within a device. This technique allows for detailed analysis of the electrical and thermal contributions to stress during both DC and AC operation. The electrical characteristics of the modeled device are compared to experimental measurements of comparative devices, and the bias dependent heating is compared to existing simulation data from literature for validation. The results show critical regions around the gate Schottky contact undergo drastically different transient stresses during pulsed operation. Specifically, stress profiles within the AlGaN layer around the gate footprint undergo highly tensile electro-thermal stresses while stresses within the channel between the gate and drain contact undergo highly tensile electrical stress and compressive thermoelastic stress. Factors such as the operational frequency as well as the thermal boundary resistance at contacts in the device also play a major role in the thermal and deformation response of these devices. Implications on devices reliability will be discussed.

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Material and Device Characterization II : Samuel Graham
Authors : Motoaki Iwaya1, Junya Osumi1, Koji Ishihara1, Taiji Yamamoto1, Tetsuya Takeuchi1, Satoshi Kamiyama1, and Isamu Akasaki1,2
Affiliations : 1Faculty of Science and Technology, Meijo University, Nagoya 468-8502, Japan 2Akasaki Research Center, Nagoya University, Nagoya 464-8603, Japan

Resume : High performance group III nitride semiconductor based LEDs and laser diodes most fabricated by MOVPE. In situ monitoring in MOVPE is the key process in device manufacturing. These information can be feedback to growth condition and find its mechanism. So, in situ monitoring is expected key technology to improve the device performance. An in situ monitoring by x-ray can be measured to the lattice constant, nano-structure thin film, crystalline quality and so on. In this study, we examined the novel in situ XRD system for MOVPE growth of GaN. We analyzed of GaInN on GaN by in situ XRD monitoring. We also discuss the growth of GaInN/GaN superlattice on GaN and application of solar cell optimization using long period superlattice by in situ XRD monitoring. As the results, in situ XRD measures the critical thickness of introduction of a+c misfit dislocation in GaInN on GaN system by measuring the FWHM of GaInN XRD peak at only one time experiment. Accordingly, if we employ in situ XRD under various growth conditions, the optimization of the growth conditions will become easier because it would be possible to determine at which misfit dislocation increases by only one growth procedure.

Authors : Y. Tokuda, K. Miyamoto, S. Ueda
Affiliations : Aichi Institute of Technology, 470-0392 Toyota, Japan

Resume : We report a method to distinguish between Ga vacancy (VGa)-related and carbon (C)-related hole traps with similar thermal emission activation energies (0.86-0.88 eV) in MOCVD n-GaN [1]. This method combines minority carrier transient spectroscopy (MCTS) using above-band-gap light with optical deep level transient spectroscopy (ODLTS) using below-band-gap light for Schottky diodes. We used two MOCVD n-GaN on free standing n+-GaN which have the carbon (C) concentration of below ~1x1016 cm-3 (LC) and ~6x1016 cm-3 (HC), respectively. Isothermal MCTS measurements using ~355 nm UV and isothermal ODLTS measurements using ~470 nm blue LED were performed at 300 K for fabricated Schottky diodes. A peak is observed in MCTS and ODLTS at the same thermal emission time constant for the LC sample, while a peak is observed in the MCTS spectrum at the slightly different time constant from that in the ODLTS spectrum for the HC sample. The same time constant is found for LC and HC in ODLTS. This is ascribed to the difference between VGa-related and C-related hole traps in photoionization energy [2,3]. In the LC sample, VGa-related hole traps are dominant with C-related hole traps in concentration below detection sensitivity. There are C-related hole traps in addition to VGa-related hole traps in the HC sample. We will further report the energy levels of these hole traps and their trap concentrations. [1] Y. Tokuda, CS MANTECH, 19 (2014). [2] A. R. Arehart, A. Corrion, C. Poblenz, J. S. Speck, U. K. Mishra, and S. A. Ringel, Appl. Phys. Lett. 93, 112101 (2008). [3] A. Armstrong, A. R. Arehart, D. Green, U. K. Mishra, J. S. Speck, and S. A. Ringel, J. Appl. Phys. 98, 053704 (2005).

Authors : D. Gregušová1, E.-Bahat-Treidel2, Š. Haščík1, M. Blaho1, M. Ťapajna1, J. Derluyn3, M. Germain3, O. Hilt2, J. Würfl2, J. Kuzmík1
Affiliations : 1Institute of Electrical Engineering SAS, Dúbravská cesta 9, 841 04 Bratislava, Slovakia: 2Ferdinand-Braun-Institute, Leibniz Institute für Höchstfrequenztechnik, Gustav-Kirchhoff-Strasse 4, 12489 Berlin, Germany: 3EpiGaN NV, Kempische steenweg 293, 3500 Hasselt, Belgium

Resume : Development of AlGaN/GaN-based normally-off high-electron mobility transistors (HEMTs) faces several issues. Among them is a lack of a true pinch-off, low threshold voltage for low on-state resistance devices, high gate leakage of Schottky gates contact, or a threshold voltage drift for HEMTs with a metal-oxide-semiconductor (MOS) gate structures. Inversion-type enhancement-mode GaN-based field-effect transistors is not considered here as an alternative as it features low channel mobility and freedom to manipulate the threshold voltage remains limited. In our approach we propose normally-off AlGaN/GaN MOS HEMTs, where the gate oxide/semiconductor interface is obtained by plasma oxidation of a thin AlN cap layer, and subsequently overgrown by Al2O3 using atomic-layer-deposition at low-temperature. Consequently, inherent MOS-interface is formed with potentially low density of defects and surface donors. In this case there is a possibility to increase the threshold voltage technologically by oxide thickness increasing. Moreover, overgrown Al2O3 kept forward gate leakage current low with a capability of full channel opening. On the other hand, AlN was left intact at the access regions providing 2nd quantum well and low access resistances despite of only 3-nm thick AlGaN barrier. Devices are further optimized by tailored pre- and post-metallisation annealing steps in oxygen or nitrogen atmosphere. Finalized MOS HEMTs grown on Si with in-situ passivation show true pinch -off with < 10-8 A/mm drain leakage current, threshold voltage > 1 V, maximal drain current > 0.5 A/mm, a low hysteresis, and mitigated trapping effects. Support of HipoSwitch EU project no. 287602 and VEGA no. 2/0105/13 are acknowledged

Epitaxy and Devices IV : Alphonse Torres
Authors : Takashi Matsuoka, Kanako Shojiki, Takeshi Kimura, Tomoyuki Tanikawa, Ryuji Katayama
Affiliations : Institute for Materials Research, Tohoku University, Sendai, Japan

Resume : A nitride semiconductor with a wurtzite structure is a very promising material for high performance devices in comparison with the conventional semiconductors. The exotic characteristic is a crystallographic polarity. This polarity leads to the polarization in the crystal as pointed out in 1988. This polarization influences the characteristics of the epitaxial growth and all the device performances. Up to now, the growth and devices with group-III polarity have been mainly reported because in the N-polar growth, "{1" "1" ̅"0" "1" ̅"}" and "{1" "1" ̅"0" "2" ̅"}" facets appearing at the edges of the growth islands form a rough surface. In this paper, the N-polar epitaxial growth and its merit are reviewed. For epitaxial growth, the step-flow growth mode has to be promoted. This mode can be realized by using the following optimum conditions; the relatively low V/III ratio for enhancing the migration of Ga adatoms on the surface, relatively high reactor-pressure for forming {11(_)00}, and introduction of off-cut substrates for controlling the step distance. N-polar GaN with the same characteristics of quality, the dislocation density and the p-type carrier concentration as Ga-polar GaN has been successfully grown. The N-polar growth has an advantage in the growth of In-rich materials because one N atom is captured with three Ga atoms at the growth front, while that is captured with only one Ga atom in Ga-polarity. In device applications, the polarization field can improve

Authors : B. Damilano (1), J. Faugier-Tovar (2), E. Frayssinet (1), Y. Cordier (1), F. Semond (1), D. Turover (2)
Affiliations : (1) CRHEA-CNRS, Rue B. Gregory, 06560 Valbonne, France (2) SILSEF SA, 382, rue Louis Rustin, Archamps Technopole, F-74160 ARCHAMPS, France

Resume : Si substrates are attractive for the growth of GaN because of their large size, quality and availability. However, due to the large thermal expansion coefficient mismatch between GaN and Si, the grown layers can crack during the cooling down after growth. This cracking can be avoided by using strain-balancing layers such as AlN or AlGaN interlayers, AlN/AlGaN superlattices,… These approaches are quite complex and require a perfect control of the stress during growth. A simpler approach to avoid cracks is to use mesa-patterned Si substrates. Thanks to the stress relaxation at the mesa free- edges, the cracking of the nitride layers can be limited. The cracking and the final stress of the layers critically depend on the mesa design. Also, depending on the application which is targeted, the pattern has to be adapted. The mesa design optimization can benefit from a mask-less approach using laser lithography. We show that by using such method we can design square mesas with very well controlled sizes from 20x20 µm2 to 500x500 µm2. 2-3 µm-thick GaN layers on 200 nm-thick AlN buffer layers were grown on these mesa-patterned Si substrates by metal-organic chemical vapor deposition. Structural and morphological characterizations show that high quality layers, without cracks, are obtained.

Authors : H. Ben Ammar1, M.P. Chauvat1, P. Gamarra2, C. Lacam2, M.Tordjman2,M.A. di Forte-Poisson2, and P. Ruterana1
Affiliations : 1. Centre de Recherche sur les Ions, les Matériaux et la Photonique UMR 6252, CNRS ENSICAEN UCBN CEA, 6 Boulevard du Maréchal Juin, 14050 Caen Cedex, France 2. III-V Lab, Alcatel-Thales-LETI, Route de Nozay, 91460 Marcoussis, France

Resume : InAlN layers are of a great interest for high electron mobility transistors (HEMT), distributed Bragg reflectors (DBR), and ultraviolet light-emitting diodes (UV LED). Their physical properties are expected to be more interesting in comparison to AlGaN for HEMT applications; this is mainly due to the possibility of obtaining layers which are lattice matched to GaN (LM-GaN) at around 18% Indium content. On the other hand, changing the Indium content may allow to tune the band gap from UV to deep IR. The main issue for InAlN is that degradation takes place even during the growth of nearly LM-InAlN/GaN heterostructures. Previous works have analyzed the influence of various growth parameters, e.g. metal precursor fluxes, ammonia flux, and temperature. However, the mechanisms that govern such degradation are not yet well understood. Recently, two possible explanations for this degradation have been proposed: 1) the influence of the dislocations inside the GaN buffer layer, and 2) an intrinsic formation of pinholes at the coalescence of the growth hillocks inside AlInN layers. In the following, we report characterization studies related to a series of InAlN layers which thickness was around 65nm. The main parameter investigated during the growth was the growth pressure. From, conventional transmission electron microscopy (TEM), and atomic force microscopy (AFM), it was shown that the degradation mechanisms are complex and may critically depend on the growth kinetics.


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Symposium organizers
Michał BOCKOWSKIInstitute of High Pressure Physics

ul. Sokolowska 29/37 Warsaw Poland

+48 664 446 092
Yusuke MORIOsaka University, Graduate School of Engineering

2-1 Yamada-Oka, Suita Osaka 565-0871 Japan

+81 6 6879 7707
Henryk TEISSEYREInstitute of Physics | Polish Academy of Sciences

Al. Lotników 32/46 02-668 Warsaw Poland

+48 606 666 751
Benjamin DAMILANOCentre de Recherche sur l'Hétéro-Épitaxie et ses Applications (CRHEA) | Centre National de la Recherche Scientifique

Rue Bernard Grégory 06560 Valbonne France

+33 4 93 95 78 29