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INFORMATION AND COMMUNICATION TECHNOLOGIES

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Integration of advanced materials on silicon: from classical to quantum applications

The symposium aims at gathering scientists working on monolithic and heterogeneous integration of new materials, to enable additional functionalities on silicon-based platforms. Its originality lies in the fact that it considers both classical approaches and emerging topics linked to quantum applications.

The various research fields covered in the symposium pave the way towards highly functionalized Si-based technologies which address current and future challenges in our society.

Scope

The microelectronics industry has delivered faster and more efficient computing devices at a remarkably consistent pace for several decades. This has mostly been achieved by downscaling classical MOS transistors, which continuously provided improved performance and lower energy consumption for every new technology node. These advances have led to the development of highly performing personal computers and low-power mobile devices, which are nowadays affordable for mass population.

More recently, the demand for high performance devices and mass data transfer has soared, driven by new societal needs linked to the “Internet-of-things” and the growing demand for ultra-fast data communication and data transfer, cognitive systems and new computing paradigms, such as quantum information processing.

However, transistors cannot scale down indefinitely. Industrials are therefore looking beyond classic architectures and concepts to secure future generations of devices. Still, the best contenders are likely to be those that can be integrated with conventional silicon chip platform.

For quantum information science, silicon is also emerging as a promising route. Elementary silicon qubit devices have been demonstrated with high-fidelity operation highlighting the potential of silicon-based quantum devices in terms of scalability and manufacturability. Programmable quantum circuits based on silicon photonics chip are currently extensively investigated. Even for emerging quantum materials that are not widely used in the industry, like topological insulators, quantum-dots structures, magnetic or superconductor materials, silicon could be a platform of choice for device integration.

The symposium aims to highlight novel and innovative approaches that allow monolithic and heterogeneous integration on silicon technology, targeting CMOS, application-specific integrated solutions or quantum systems.

The scope includes the fundamental understanding of new material properties, the implementation of novel integration schemes, the modeling techniques and new application fields. The focus will be on the fabrication, characterization and simulation of materials considered as non-standard for Si technology. Contributions related to innovative hetero-integration techniques will be encouraged. Finally, a particular attention will be given to devices and applications beyond current computation technologies that aim at addressing new computing paradigms such as quantum and neuromorphic computation. The productive interaction across disciplines will help materials scientists drive the exciting transition towards higher-value, highly functionalized Si-based microelectronics.

Hot topics to be covered by the symposium

Material growth, characterization and simulation:

Group IV and compound semiconductors:

Group IV materials and alloys (SiGe, GeSn SiGeSn), III-V and II-VI compound semiconductors, grown or transferred on monocrystalline substrates or insulators. Group IV and III-V quantum dots and nanowires integrated on Si.

Oxides and nitrides:

Functional perovskites, ZnO, GaN and heterostructures, oxides with resistive or metal insulator transition, topological insulators, piezoelectric materials.

2 dimensional materials:

Growth and transfer of Graphene, Transition Metal Dichalcogenides and Boron Nitride on semiconductors, hybrid 2D/semiconductor devices.

Novel materials for Quantum applications

Semiconductor/Superconductor Interfaces, Topological insulators, Semiconductor Quantum Dot qubit Materials, purified 28Si, Spin qubit, Si/SiGe Heterostructures

Integration Techniques: 

Advanced heteroepitaxy:

Selective growth on patterned substrates, epitaxial lateral overgrowth, self-assembly techniques, remote epitaxy.

Layer Transfer

2.5D & 3D integration (monolithic & heterogeneous)

Innovative synthesis & integration methods of materials and devices used for quantum systems

Applications:

Data processing and communication:

Advanced CMOS scaling, single electron & single photon devices, neuromorphic architectures, IOT, spintronics, ultra-low power & RF electronics, Integrated photonics, IR and THz lasers.

Quantum information science and emerging applications of quantum materials

Quantum communication, quantum computing, quantum sensing.

Life-Sciences application and environmental sensors:

Semiconductor plasmonics, mid-infrared and THz sensing, gas sensors, integration with piezo-materials for MEMS-like sensors and opto-mechanics

List of invited speakers:

  • Abderraouf Boucherif, Sherbrooke University, Canada.
  • Ageeth A. Bol, Eindhoven University of Technology, The Netherlands.
  • Akira Toriumi, Tokyo University, Japan.
  • Antonio di Bartolomeo, Università degli Studi di Salerno, Italy.
  • Detlev Grutzmacher, Forschungszentrum Jülich, Germany.
  • Douglas Paul, Glasgow University, UK.
  • Farid Medjdoub, IEMN / CNRS, France.
  • Giordano Scappucci, QUTech, TU-Delft, The Netherlands.
  • Jonatan Slotte, Aalto University, Finland.
  • Luca Pirro, Global Foundries Dresden, Germany.
  • Lukas Czornomaz, IBM Zurich, Switzerland.
  • Maud Vinet, CEA/LETI, France.
  • Nikolay Abrosimov, IKZ Berlin, Germany.
  • Thierry Baron, LTM/CNRS, France.
  • Thierry Taliercio, Univ Montpellier, CNRS, IES, France.

Scientific Committee members:

  • R. Calarco, PDI Berlin, Germany.
  • M. De Seta, Univ. of Roma, Italy.
  • T. Ernst, CEA/LETI, France.
  • M. Brehm, JKU Linz, Austria.
  • G. Patriarche, CNRS Saclay, France.
  • V. Kaganer, PDI Berlin, Germany.
  • H. Liu, U.C. London, UK.
  • M. Cousineau, INP/CNRS, France.
  • B. Vincent - Coventor/LAM.
  • Voigt, TU Dresden, Germany.
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Session I: advanced CMOS : Inga A. Fischer
09:00
Authors : Luca Pirro
Affiliations : GlobalFoundries, Dresden, Germany

Resume : Nowadays the rising of new markets like IoT and 5G are drastically reshaping the microelectronic industry. Aggressive device scaling has been replaced by technology differentiation with closer collaborations between foundries and customers. Ad-hoc process integrations are required to fulfill the circuit specifications followed market needs. In this talk we will review how GlobalFoundries has optimized its process to fulfill these requirements. A general review of 22FDX technology will be presented, follow by a description of process elements and challenges to achieve superior RF/mmWave, low-leakage and low-noise performances. The use of a Fully-Depleted Technology allows pursuing the device miniaturization with low costs. Optimized access resistance and strain are implemented to obtain superior RF/mmWave performance (fT>350GHz) on the same substrate as for logic devices. With appropriate implant condition, it is possible to fabricate devices with minimum off-leakage (IOff<1pA) next to a RF one. The use of un-doped silicon film reduces the random dopant fluctuation effect with general local mismatch and 1/f improvement compared to standard bulk technologies. Optimized layout can further boost the transistor performance without additional process complexity or costs. In 22FDX, the threshold voltage can be dynamically adjusted according to the required operation condition for minimum leakage or maximum performance. The talk will conclude with an overview on future challenges reporting example of already initiated work

B.I.1
09:30
Authors : J.M. Hartmann; M. Veillerot
Affiliations : University Grenoble Alpes and CEA, LETI, Grenoble, France

Resume : A few years ago, we have investigated the Cyclic Deposition/Etch of Si(:P) in the Sources/Drains regions of MOS transistors. Blanket growth occurred at 550°C while materials on dielectrics were selectively etched at 600°C with GeH4-catalyzed HCl. Thanks to the presence of Ge atoms close to the surface, Si etching is indeed much faster with HCl and GeH4 than with HCl. Performing those etches at 550°C instead of 600°C would be advantageous, as the thermal budget would be lower (3D integration), throughput higher and amorphous Si(:P) etching easier. We have therefore quantified the impact of temperature, pressure and flows on the HCl and GeH4 Etch Rate (ER) of monocrystalline Si, (doped or tensile) Si:P ([P] = 1E20 or 1.5E21 cm-3) and Si0.7Ge0.3(:B) ([B] ~ 2E20 cm-3). Increasing the etch pressure and reducing the H2 flow resulted in linear increases of the Si ER. Decreasing at 650°C the HCl flow yielded (i) definitely higher Si ER at 20 Torr and (ii) explosively higher Si ER at 90 Torr. We have then quantified, with those reduced flows, the impact of temperature on ER. ER were always higher at 90 Torr than at 20 Torr. We had at 20 Torr exponential ER decreases as the temperature decreased, with SiGe:B ER > SiGe ER >> Si ER and Si:P ER > Si ER > t-Si:P ER. The former was due to surfaces richer in Ge (and B) atoms, which acted as catalysts for H and/or Cl desorption. Going over to 90 Torr yielded reasonable SiGe(:B) (Si, Si:P and t-Si:P) ER at temperatures as low as 500°C (550°C).

B.I.2
09:45
Authors : Yan Hua Huang1,2,3, Clement Porret3, Andriy Hikavyy3, Gianluca Rengo2,3, Hao Yu3, Marc Schaekers3, Jean-Luc Everaert3, Marc Heyns2,3 and Roger Loo3
Affiliations : 1 National Tsing Hua University, No. 101, Section 2, Kuang-Fu Road, Hsinchu 300, Taiwan 2 K.U. Leuven, Celestijnenlaan 200D, B-3001 Leuven, Belgium 3 Imec vzw, Kapeldreef 75, B-3001 Leuven, Belgium

Resume : SiGe:B materials are widely used as source/drain stressors in modern technology nodes. Alloying Si with Ge enlarges the lattice parameter and allows to transfer compressive strain to the channel, resulting in enhanced carrier mobilities in pMOS devices. Moreover, it increases the achievable p-type doping concentrations, which is beneficial to reduce series resistance. As the Ge content modifies Ti / SiGe:B contact properties (via the highest achievable active doping, SiGe:B lattice parameter, Fermi level pinning) it needs to be precisely chosen and tuned. In this contribution, we focus on Ti / SiGe:B contacts formed using in situ doped SiGe:B epitaxially grown on Si. We investigate mechanisms affecting the lowest achievable contact resistivity (ρc) using the multi-ring CTLM technique. This is of high importance as high contact resistances limit the performance of scaled devices. We first discuss how strain in SiGe:B influences ρc by modulating the layer thickness while keeping the Ge content and doping concentration constant. We find that optimal conditions, providing ρc values approaching 2E-9 Ω.cm2, correlate with a maximal amount of strain in the SiGe:B. We also apply rapid thermal anneals post metal deposition to further improve the fabricated contacts and characterize their thermal stability. We believe that this work is an important step towards understanding and controlling contact properties in the low 1E-9 Ω.cm2 regime.

B.I.3
10:00
Authors : A. Vohra1, 2, C. Porret2, D. Kohen3, S. Folkersma1,2, J. Bogdanowicz2, M. Schaekers2, J. Tolle3, A. Hikavyy2, E. Capogreco2, L. Witters2, R. Langer2, W. Vandervorst1,2, and R. Loo2
Affiliations : 1 K.U. Leuven, Dept. of Physics, Celestijnenlaan 200D, 3001 Leuven, Belgium; 2 Imec vzw, Kapeldreef 75, 3001 Leuven, Belgium; 3 ASM, 3440 East University Drive, Phoenix, AZ 85034, USA;

Resume : The continuous downscaling of MOSFET devices leads to a reduction in Source/Drain (S/D) contact area which causes an increase in contact resistance (ρc), limiting device performances. Novel approaches are required to significantly lower contact resistivity. In addition to high active doping, optimal S/D fabrication schemes need to provide conformal epi layers, grown with a restricted thermal budget without compromising material crystalline quality. The grown layers should have a lattice constant suitable to introduce the correct strain type in the channel. For Ge pMOS devices the low boron solubility in Ge (5.5x1018 cm-3) makes these requirements even more challenging. In this contribution, we report on production compatible low temperature (⩽320°C) selective epitaxial growth schemes for boron doped Ge0.99Sn0.01 and Ge in S/D areas of FinFET and gate-all-around (GAA) strained-Ge pMOS transistors. High dopant activation up to a factor 60 above the B solubility limit (3.2×1020 cm-3) is achieved by either Sn-alloying or the use of Ge2H6 as precursor gas. We obtained ρc values as low as 2.8×10−9 Ω cm2 without any post-epi anneal. For Ge0.99Sn0.01, a careful optimization of process conditions is required to suppress Sn precipitation and degradation of material quality, while for the selective growth of Ge:B with Ge2H6 requires a cyclic deposition-etch approach.

B.I.4
10:15
Authors : Lars Rebohle; Viktor Begeza; Marcel Neubert*; Yufang Xie; Slawomir Prucnal; Jörg Grenzer; Shengqiang Zhou
Affiliations : Helmholtz-Zentrum Dresden - Rossendorf, Institute of Ion Beam Physics and Materials Research, Bautzner Landstraße 400, 01328 Dresden, Germany; *Rovak GmbH, Zum Teich 4, 01723 Grumbach

Resume : Silicides have been widely used for CMOS devices in order to provide a stable Ohmic contact with a low contact resistivity. With the integration of Ge on Si the focus also shifted to germanides as a low resistivity contact material. In addition, ferromagnetic germanides may serve as spin injector materials for Ge-based spintronic devices. Usually, germanides have been fabricated by furnace or rapid thermal annealing in literature. In this contribution we investigate the formation process of Ni germanides using a combination of magnetron sputtering and flash lamp annealing (FLA). Three different types of Ge served as a substrate for the deposition of the transition metal: amorphous Ge made by magnetron-sputtering on a SiO2-Si substrate, polycrystalline Ge made by magnetron-sputtering followed by FLA, and monocrystalline Ge in the form of a (100) Ge wafer. After metal deposition samples are in-situ annealed by FLA without breaking the vacuum, which triggers the formation of germanides and prevents a possible, but unwanted oxidation. In order to investigate the crystallization behavior, the structures have been characterized by Raman spectroscopy, X-ray diffraction, ellipsometry, current-voltage and Hall effect measurements.

B.I.5
10:30 coffee break    
 
Session II: Power & Piezo materials : Clément Porret
11:00
Authors : I. Abid, R. Kabouche, F. Medjdoub
Affiliations : IEMN-CNRS, Institute of Electronics, Microelectronics and Nanotechnology, Villeneuve d'Ascq, France

Resume : GaN-based switches will offer greater efficiency, power handling, and compactness as compared to the well-established, widely available silicon MOSFET power devices—all factors that are critical to meeting the needs of today’s systems. In this frame, GaN high electron mobility transistors (HEMTs) grown on silicon substrate offer the potential to revolutionize power electronics by enabling important energy savings and new flexibility for advanced power circuits. These types of emerging transistors with superior performance have been largely demonstrated and are being widely commercialized by numbers of industrials. However, the vertical breakdown voltage of GaN-on-silicon heterostructures is currently limited to slightly above 1000 V, preventing to benefit from this technology for higher voltage applications. This talk will discuss some potential solutions for next generation lateral GaN-on-Silicon power devices targeting 1200 V and above, which would pave the way to much lower on-resistance than other existing technologies operating above 1 kV.

B.II.1
11:30
Authors : I. Huyet, A. Drouin, E. Butaud, I. Radu
Affiliations : E. Courjon; F. Bernard; T. Laroche; S. Ballandras

Resume : The radio-frequency (RF) filter market for mobility devices is exploding and requirements are more and more stringent, in particular for high frequencies (typically above 2GHz). Surface Acoustic Wave (SAW) filters provide high selectivity, low losses and small form factor, at reasonable cost. The piezoelectric-on-insulator (POI) structure enables high performance SAW filters, thanks to guided modes within thin top piezoelectric layer (confined acoustic energy) and minimal temperature coefficient of frequency (TCF). High quality transfer of oriented single-crystal LiTaO3 thin films (from 0.3 to 1µm thick) on Si substrate is obtained by using SmartCutTM technology, overcoming process challenges. The transferred films present a high thickness uniformity, with crystal structure comparable to SAW grade LiTaO3 bulk and mono-domain ferroelectric surface. Single port SAW resonators fabricated on POI substrates, operating from 1.4 to 2.3GHz, exhibit enhanced results on acoustic parameters such as coupling coefficient (k²), quality factor (Q) and TCF. These results are consistent with theoretical estimations, paving the way to new SAW filters at high frequencies.

B.II.2
11:45
Authors : Ruiguang Ning, Seung-Hyub Baek
Affiliations : Korea Institute of Science and Technology, University of Science and Technology; Korea Institute of Science and Technology, University of Science and Technology

Resume : Piezoelectric thin film have previously been widely integrated into microelectromechanical systems(MEMS) device structures. Although polycrystalline materials are well used in MEMS devices single crystalline materials are always considered to be a high performance material can enhance efficiency of the actuating or harvesting devices. But most kind of MEMS device fabrication are based on silicon, it requires integration of single crystalline thin films onto silicon. Here we suggest to use transfer technology to solve the problem. In our research we fabricated epitaxial growth Pb(Mn1/3Nb2/3)O3-Pb(Zr,Ti)O3(PMN-PZT) on STO substrate by using LSMO as template layer. The epitaxial growth of PMN-PZT was confirmed by XRD analysis and the rocking curve was 0.067°means high quality single crystalline thin film. Surface topography was measured by atomic force microscope average RMS was around 5 nm . After epitaxial growth on single crystalline substrate, here we report integration of single crystalline PMN-PZT thin film onto silicon substrate by epitaxial transfer using thermal compression bonding and free standing transfer technology. The hysteresis curves were measured before and after thin film transfer to investigate the influence caused by bonding process. MEMS device were fabricated to check the performance of the transferred PMN-PZT thin film.

B.II.3
12:00
Authors : Y. Popoff (1;2), P. Wittendorp (3), F. Tyholdt (3), M. Dekkers (4), L. Nielen (5), T. Schmitz-Kempen (5), A. Sousanis (6), D. Poelman (6), P. Smet (6), L. Crocker (7), N. McCartney (7), I. Rungger (7), O. Groening (2), J. Fompeyrine (1)
Affiliations : (1) IBM Zurich Research Laboratory, Rueschlikon, Switzerland; (2) Empa, Duebendorf, Switzerland; (3) SINTEF Digital, Oslo, Norway; (4) Solmates B.V., Enschede, Netherlands; (5) aixACCT Systems GmbH, Aachen, Germany; (6) Ghent University, Ghent, Belgium; (7) National Physical Laboratory, Teddington, United Kingdom

Resume : The clamping phenomenon seen in thin piezoelectric films is detrimental for their use in piezotronic devices and Micro Electromechanical Systems (MEMS). This phenomenon describes the mechanical boundary condition imposed by the substrate on the film, which leads to a reduction of the functional response of up to several orders of magnitude compared to bulk material. Structuring the piezoelectric films however leads to declamping which results in large responses sought after when used in piezotronic applications. In this report, we show the fabrication and characterization of nano-actuators as well as their embedding in Piezoelectronic Transistors and Memories. The core of the actuators includes piezoelectric pillars which are etched in thin film PZT and PMN-PT. The redeposition-free etch of structures with nearly vertical sidewalls requires the in-depth comprehension of the etching behavior of these functional oxides in an Ion Beam Etching process. The coverage of the pillars with a SiO2 cladding is followed by an advanced planarization step which allows the completion of the piezotronic device on a flat surface on top of the actuator. Finally, to allow a free motion of the pillar, the process flow is designed in a way to leave an air gap between the cladding and the piezoelectric structure. One micron-thick actuators are characterized by Microspot Double Beam Laser Interferometer resulting in a d33 coefficient above 200 pm/V for structures down to 750 x 750 nm2. These d33 values are amongst the highest reported in literature. In larger pillars, the declamping near the edges is shown experimentally and is confirmed by Finite Element Analysis. The robust process flow is also extended to fabricate a complete Piezoelectronic Transistor, whose implementation will be shown.

B.II.4
12:15
Authors : Teck Leong Tan, Adrian M. Mak, Guan C. Loh, T. Wejrzanowski, E. Tymicki
Affiliations : Agency for Science, Technology and Research, Institute of High Performance Computing, 1 Fusionopolis Way, #16-16 Connexis, 138632, Singapore ; Warsaw University of Technology, Faculty of Materials Science and Engineering, Woloska 141, 02507 Warsaw, Poland; Institute of Electronic Materials Technology, Wolczynska 133, 01919 Warsaw, Poland

Resume : Given its relative low energy bandgap (1.12 eV), Si is unsuitable for use as strain gauge in harsh environment where temperatures are high (above 200 degrees celcius). SiC, having a wide bandgap (2.3 to 3.4 eV), chemical stability and high breakdown voltage is thus poised to replace Si in MEMS electronics in harsh conditions. However, the gauge factor of SiC piezoresistor is currently at least 3 times lower than that of Si. There is thus much room for enhancement of its piezoresistivity. In our work, high-throughput first-principles calculations is performed to predict the gauge factor and piezoresistivity of SiC doped with other elements across the periodic table, using the software VASP and BoltzTrap. In total, ~200 substitutional doping were explored (on Si and C sites) and promising formulation are tested experimentally for potential application in MEMs devices.

B.II.5
12:30 Lunch Break    
14:00
Authors : Maud VINET
Affiliations : Quantum computing program manager at CEA Leti

Resume : We have put a multidisciplinary and multi institutions team which gathers quantum physicists, integration and devices engineers, circuit designers and quantum information engineers. We want to build a quantum processor. We are aiming at delivering prototypes with a 100 qubits within 6 years and at having identified the key scientific and roadblocks for scaling up. Quantum computing is expected to extend the high performance computing roadmap at the condition to be able to run a large number of errorless quantum operations, typically over a billion. It is out of reach in actual physical systems because of the quantum decoherence. Therefore, quantum error correction techniques, which utilize the idea of redundant encoding combined with entanglement, have been introduced to cure for the errors. They come with an overhead in terms of qubits which induce a potential need for millions of qubits. Because of these large numbers of operations and physical qubits, Si-based QC appears as a promising approach to build a quantum processor; thanks to the size of the qubits, the quality of the quantum gates and the VLSI ability to fabricate billions of closely identical objects. The quality of Si spin qubits has improved very fast with the introduction of isotopically purified 28Si, as observed by multiple research groups. In this presentation, we will discuss the architectures to design a large scale quantum computer based on Si spin qubits and we will review their pros and cons regarding variability assumptions and technological achievements.

B.III.2
 
Session III: Quantum information engineering : Didier Landru
14:30
Authors : Giordano Scappucci
Affiliations : QuTech, TU Delft

Resume : Naïve answers to this thought-provoking question could range from “Never! Same story as with the first germanium transistor, then silicon took over” to “Germanium is already leading, you just don’t know it”. Rather than providing a (biased) answer, the goal of this talk is to give the audience enough clues to hopefully make their own judgement. Most-importantly, being a material scientist and not the qubit world-expert, I hope to give you my perspective on a more profound question: what properties will make a material platform the leading one in quantum information? How much room do we have to engineer? I will make a pitch for using hole spins in quantum dots as qubits and report the rapid progress made by our small team in Delft using strained Ge/SiGe heterostructures. I will not hide the current limitations of the platform. Probably a first case in solid state qubits, in just one year we have progressed from making uniform quantum dots in planar Ge to implement high-fidelity single and two qubit gates. Systems with more qubits are on the horizon. In parallel, hybrid semi-super devices have also been fabricated using these strained Ge quantum wells. Therefore, the following question is legitimate: can the strained Ge platform combine semiconducting, superconducting, and topological systems for superior hybrid technology?

B.III.1
15:00
Authors : Daniel Jirovec, Andrea Hofmann, Andrea Ballabio, Jacopo Frigerio, Ivan Prieto, Daniel Chrastina, Giovanni Isella, Georgios Katsaros
Affiliations : IST Austria; IST Austria; L-Ness & Politecnico di Milano; L-Ness & Politecnico di Milano; IST Austria; L-Ness & Politecnico di Milano; L-Ness & Politecnico di Milano; IST Austria

Resume : Hole spins in Germanium offer the possibility for record manipulation times due to the strong spin-orbit coupling. In addition, they should be largely immune to hyperfine noise. Here we present electrostatically defined quantum dots hosted in a two-dimensional Germanium hole gas. This approach provides excellent control over the measured system, which we can tune continuously from a single quantum dot to a double quantum dot. We demonstrate Pauli spin blockade and measure relevant material properties. From the large g-factor anisotropy we conclude that the confined states are mostly of heavy-hole type.

B.III.3
15:15
Authors : K.-H. Heinig*, G. Hlawacek*, H.-J. Engelmann*, T. Prüfer*, X. Xu*, W. Möller*, L. Bischoff*, A. Gharbi°, R. Tiron°, M. Rommel", J. von Borany*
Affiliations : * Helmholtz-Zentrum Dresden-Rossendorf, Dresden, Germany ° CEA-LETI, Grenoble, France " Fraunhofer IISB, Erlangen, Germany

Resume : The transistor pathway predicts an evolution from lateral MOSFETs via FinFETs to vertical nanowire gate-all-around FETs (vNW GAA-FET). Aiming at low-power electronics we replace the channel of the vNW GAA-FET by a SiO2 layer with an embedded Si Quantum Dot (QD), thus manufacturing a Single Electron Transistor (SET). To achieve room temperature (RT) operation of the vNW GAA-SET, Si QDs of ~3 nm diameter and tunneling distances of <1 nm have to be manufactured. This is far beyond the present possibilities of lithography. The challenge of such tiny structures has been solved in the framework of our European project IONS4SET [1] by means of a controlled self-organization and self-alignment process. Nanopillars with diameters down to ~20nm have been fabricated from Si/SiO2/Si layer stacks by Electron Beam Lithography and Reactive Ion Etching (RIE), a further diameter reduction to ~10nm has been achieved by sacrificial plasma oxidation. Before RIE the SiO2 layer is transferred to SiOx by Si+ ion beam mixing, which allows a controlled self-organization of a Si QD during thermally activated phase separation using RTA. During phase separation the Si QD becomes also self-aligned with respect of the upper and lower Si, thus forming the tunnel distances of ~1nm. [1] This work has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement No 688072 (www.ions4set.eu).

B.III.4
15:30 Coffee break    
16:00
Authors : M.Lodari (a), A.Tosato (a), D.Sabbagh (a), M.A.Schubert (b), G.Capellini (b,c), A.Sammak (d), M.Veldhorst (a), G.Scappucci (a)
Affiliations : (a) QuTech and Kavli Institute of Nanoscience, Delft University of Technology, PO Box 5046, 2600 GA Delft, The Netherlands; (b) IHP - Leibniz-Institut für innovative Mikroelektronik, Im Technologiepark 25, 15236 Frankfurt, Germany; (c) Dipartimento di Scienze, Università degli studi Roma Tre, Viale Marconi 446, 00146 Roma, Italy; (d) QuTech and Netherlands Organisation for Applied Scientific Research (TNO), Stieltjesweg 1, 2628 CK Delft, The Netherlands

Resume : Holes are rapidly emerging as a promising candidate for semiconductor quantum computing. In particular, holes in germanium (Ge) bear favorable properties for quantum operation. In strained Ge/SiGe quantum wells, they also feature the attractive property of a light effective mass parallel to the Ge well interface, providing large energy level spacing in quantum dots and allowing to relax lithographic fabrication requirements and enhance tunnel rates. We report density-dependent effective hole mass measurements in undoped germanium quantum wells. We are able to span a large range of densities (2.0-11x10^11 cm^-2) in top-gated field effect transistors by positioning the strained buried Ge channel at different depths of 12 and 44 nm from the surface. From the thermal damping of the amplitude of Shubnikov-de Haas oscillations, we measure a light mass of 0.061 m_e at a density of 2.2x10^11 cm^-2. We confirm the theoretically predicted dependence of increasing mass with density and by extrapolation we find an effective mass of about 0.05 m_e at zero density, the lightest effective mass for a platform that demonstrated hole spin qubits.

B.III.5
16:15
Authors : K. Gallacher 1, M. Sinclair 1, E. McBrearty 1, A. Saeed 1, R W. Millar 1, O. Sharp 2, F Mirando 2, G. Ternent 2, G. Mills 2, B. Casey 2, S. Hild 3, M. Sorel 1 and D J. Paul 1
Affiliations : 1 University of Glasgow, School of Engineering, Rankine Building, Oakfield Avenue, Glasgow, G128LT, U.K. 2 Kelvin Nanotechnology Limited, Rankine Building, Oakfield Avenue, Glasgow, G12 8LT, U.K. 3 SUPA School of Physics and Astronomy, University of Glasgow, Kelvin Building, University Avenue, Glasgow G12 8SU, U.K.

Resume : The atomic transitions from warm gases of Rb and Cs atoms have been used to produce chip-scale magnetometers and atomic clocks for magnetoencephalography and timing applications respectively. These systems lock narrow linewidth lasers to specific atomic transitions to either measure the spin rotation induced by a magnetic field or the population of an upper clock state. Cooling atoms in vacuum through Doppler cooling or optical molases provides the ability to further enhance the accuracy or sensitivity of clocks, magnetometers or quantum sensors through the narrowing of transitions by cooling to microKelvin temperatures. Here we present a Si3N4 on Si photonics platform which includes MEMS Rb cells and integrated DFB lasers at 780.24 nm appropriate for 87Rb atoms. GaAs/AlGaAs DFB lasers with over 30 mW of power at 780.24 nm with a linewidth ~5 MHz are wafer bonded to the Si3N4 waveguides using spot size converters for >80% coupling efficiency. A range of key photonic components for quantum systems are demonstrated including waveguides with <0.3 dB/cm loss, polarising beamsplitters, polarisation rotators (lambda/2), phase modulators and photodetectors. A key first step for cold atom systems is to lock the DFB lasers either to an optical cavity through Pound-Drever-Hall locking or to an atomic transition by saturation absorption spectroscopy. We demonstrate locking to microrings with Qs of ~1M and demonstrate saturation absorption spectroscopy with MEMS Rb cells at 780.24 nm.

B.III.6
16:30 16:30-17:30 - Poster oral presentation: 3' per poster    
 
Poster session : N/A
17:30
Authors : Eunsun-Youm 12*, Sunil-Shim 21, Minchul-Park 21, Yugyun-Shin 21, ByoungDeog-Choi 22
Affiliations : 1 Semiconductor R&D Center, Samsung Electronics, Hwasung, Gyeonggi 445-701, Korea 2 School of Information and Communication Engineering, Sungkyunkwan University, Suwon, 440-746, Korea

Resume : 3D-NAND is a successful alternative to overcome the scaling limits of 2D-NAND. While 2D-NAND has been scaled down laterally, 3D-NAND stacks more gate WLs vertically to collect more cells per unit area. However, as the number of WLs increases, the total height of cell increases as well. The increase in cell height makes the process highly difficult. Therefore, reducing the Lgate / Lspace in the vertical direction is a major attainment target of 3D-NAND. However, reducing gate length will degrade gate control ability, so cell stacks (ONOP) should be also scaled down to compensate the gate control ability degradation. However, from a cell reliability perspective, the cell stacks cannot be continuously reduced. Therefore, it is very important to ensure cell performance and reliability through improving the physical properties of cell stacks. In this study, we have researched the 3D-NAND cell characteristics according to different physical properties of channel poly at the same thickness. In particular, we have studied the effects of channel poly grain size on initial cell characteristics and reliability of 3D-NAND. We fabricated 3D-NAND strings consisting of 32 layers of WL and three groups of samples with different channel poly grain sizes. Initial Id-Vg measurement showed that when the channel poly grain size increased by 37.8%, the sub-threshold swing decreased by 7.9% and the on-current increased by 38.6%. The erase Vth shift after 100K Program/Erase cycle also decreased by 10.3%. In addition, we measured charge pumping current to compare the interfacial trap. We found out that the charge pumping current decreased as the channel poly grain size increased. We interpret the results that the decrease of trap sites in grain boundaries improves the cell switching characteristic and reliability. We believe that elemental technologies for deposition of macaroni channel poly with large grain size within channel hole are crucial to improve cell performance and reliability degradation resulting from scaling 3D-NAND.

B.P.1
17:30
Authors : Peng Shi, Lifang Yang, Liwu Jiang, Chuanhui Zhang
Affiliations : University of Science and Technology Beijing

Resume : The structural stability and electronic properties of zigzag and armchair metal-encapsulated Si nanowires are investigated using density functional theory. Results show that most the metal-encapsulated SiNTs with the same space group can be stabilized through doping by metal atoms with silicene-like structures. Compared with the different chirality, (4,0) zigzag M@SiNTs are more stable than (3,3) armchair M@SiNTs. The band gaps of (3,3) and (4,0) SiNTs are 1.06 eV and 0.06 eV, they are both semiconductors. But most (3,3) armchair and (4,0) zigzag M@SiNTs are conductors, except (3,3) Sn@SiNT, (4,0) K@SiNT and (4,0) Ba@SiNT are semiconductors with small value of band gaps. The interaction between encapsulated metal and silicon atoms makes out orbital hybridizations, and decreases the gap between valence band and conduction band. Some finite (3,0) nanowires have higher binding energy than hexagonal prism ones, and they are energetically stable as increasing the number of Be. The deformation electron density shows the (3,0) nanowires are sp2 hybridization, different from charge shielding of hexagonal prism nanowires. Therefore, BenSi6(n+1) nanowires may play important roles in spintronics and nanoelectronics in the future.

B.P.2
17:30
Authors : Mitsuaki Yano1, Taiki Kawamoto1, Hiroshi Ota1, Yuichi Hirofuji1, Kazuto Koik1, Yutaka Nakamitsu2, Sadao Kadokura3
Affiliations : 1. Nanomaterials Microdevices Research Center, Osaka Institute of Technology; Asahi-ku, Osaka 535-8585, Japan 2. Institute of Semiconductor & Electronics Technologies, ULVAC, Inc.; Susono, Shizuoka 410-1231, Japan 3. FTS Corporation; Hachioji, Tokyo 192-0024, Japan

Resume : Characteristics of the Hf0.5Zr0.5O2 (HZO) thin films grown on Si substrates by a facing-target sputtering (FTS) method are reported. FTS has advantages of low plasma-damaged, dense, uniform, and high-coverage deposition by placing the substrate remote from the magnetically confined plasma discharge area between a set of two facing targets. P-type (001) Si covered with a ~60 nm thick TiN film was used for the substrates. The TiN deposition was conducted on the Si surface after wet-etching by conventional reactive magnetron rf sputtering at room-temperature using an Ar:N2=8:2 atmosphere and a Ti metal target. The HZO deposition was conducted with the thickness of 5-25 nm by FTS on the TiN/Si substrate using a set of HfO2 and ZrO2 ceramic targets and the rf discharge in 0.1 Pa Ar atmosphere. After the deposition, the HZO/TiN/Si were post-annealed using RTA. The surface of the HZO layer was smooth and flat with the RMS roughness of ~0.2 nm. It was indicated by TEM analysis that the HZO layer was composed of randomly oriented and well crystallized large grains while the TiN layer was composed of randomly oriented small grains presumably due to the presence of unintentionally formed ~2 nm thick SiO2 layer at the TiN/Si interface. The compositional ratio of the HZO layer measured by XPS was Hf:Zr=1:1 in agreement with the expectation from the FTS configuration. GI-XRD analysis revealed that the HZO layer before annealing was amorphous when deposited at room-temperature, and it turned to be polycrystalline with orthorhombic structure after the annealing at higher temperatures than 600 C. On the other hand, the HZO film before annealing was polycrystalline with monoclinic structure when deposited at 400 C, and the monoclinic structure was retained even after the annealing at the same temperatures.

B.P.3
17:30
Authors : Mitsuaki Yano, Taichi Inoue, Hiroshi Ota, Yuichi Hirofuji, Masatoshi Koyama, Kazuto Koike
Affiliations : Nanomaterials Microdevices Research Center, Osaka Institute of Technology; Asahi-ku, Osaka 535-8585, Japan

Resume : Characteristics of the Hf0.5Zr0.5O2 (HZO) thin films grown by a chemical solution deposition (CSD) method are reported. CSD is advantageous in obtaining compound oxide thin films with high expandability to large area deposition and high productivity since this method is a typical of non-vacuum processing. The chemical solution was prepared by dissolving HfCl4 and ZrCl4 in ethanol (Et-OH) and mixed with HNO3 aqueous solution in N2 atmosphere with the molar ratio of HfCl4:ZrCl4:Et-OH:H2O:HNO3=1:1:120:20:20, and then stirred at 50 C for 3 h in air. P-type (001) Si was used for the substrate. The substrate was irradiated by O-radicals in a plasma reactor to improve wettability, and then coated by the chemical solution using a spin-coating method with the rotational speed of 5,000 rpm. After the coating, the chemical solution film was dried at 150 C in air for 10 min, and then sintered at 500-800 C for 20 min. The thickness of the HZO film after sintering was about 20 nm. The film was uniform in composition and crack-free with the smooth surface of ~0.3 nm RMS roughness. It was indicated by XPS measurement that the HZO film didn’t contain impurities and the Hf:Zr ratio calculated from the Hf 4f and Zr 3d peaks, which were well fitted by the Gaussian curves centered at the relevant binding energies after the chemical shift in respective stoichiometric oxides, was 1:1 indicating the growth of Hf0.5Zr0.5O2 in agreement with the expectation from the chemical solution composition. GI-XRD analysis revealed that these HZO films were crystallized in the orthorhombic structure with random orientation when sintered in N2 at higher temperatures than 500 C. On the other hand, the HZO film were crystallized in the monoclinic structure with random orientation when sintered in air at the same temperatures.

B.P.4
17:30
Authors : Tae-Yeon Cho, Won-Jae Lee, Sung-Hoon Choa, Seong-Keun Cho
Affiliations : Chemical Materials Solution Center, Korea Research Institute of Chemical Technology Graduate School of NID Fusion Technology, Seoul National University of Science and Technology

Resume : Large-area (over 500mm width) barrier films were developed by roll to roll PE-CVD using SiOx and SiNx thin films, where SiH4, N2O, and NH3 were used as precursors and PET was used as the substrate. Both films produced under optimal process conditions through previous studies have excellent WVTR performance of low 10-3g/m2∙day at 40℃ and 90% relative humidity condition in a single layer structure. Furthermore, we studied the performance degradation of SiOx and SiNx barrier films under severe environmental conditions in order to study the environmental reliability characteristics of barrier films. In order to understand the exact cause of barrier degradation, chemical and physical properties such as FTIR, XPS, AES, AFM and XRR were analyzed as well as WVTR analysis. Finally, to analyze the mechanical flexibility and reliability of the barrier film, two-point bending tester was used to measure radius of curvature and fatigue test. Keywords: SiOx, SiNx, Reliability, R2R-PECVD, WVTR

B.P.5
17:30
Authors : S. Prucnal1, Y. Berencén1, M. Wang1, L. Rebohle1, R. Kudrawiec2, M. Polak2, V. Zviagin3, R. Schmidt-Grund3, M. Grundmann3, J. Grenzer1, M. Turek4, A. Droździel4, K. Pyszniak4, J. Zuk4, M. Helm1, W. Skorupa1 and S. Zhou1
Affiliations : 1Helmholtz-Zentrum Dresden-Rossendorf, Institute of Ion Beam Physics and Materials Research, Bautzner Landstrasse 400, 01328 Dresden, Germany; 2Faculty of Fundamental Problems of Technology, Wroclaw University of Science and Technology, Wybrzeże Wyspiańskiego 27, 50-370 Wrocław, Poland; 3 Felix-Bloch-Institut für Festkörperphysik, Universität Leipzig, Linnéstr. 5, 04103 Leipzig, Germany; 4 Maria Curie-Sklodowska University, Pl. M. Curie-Sklodowskiej 1, 20-035 Lublin, Poland;

Resume : The last missing piece of puzzle for the full functionalization of group IV optoelectronic devices is the direct band gap semiconductor made by CMOS compatible technology. Here we report on the fabrication of GeSn alloys with a Sn concentration of up to 6 % using ion implantation followed by ms-range explosive solid phase epitaxy. The n-type single crystalline GeSn alloys are made by co-doping of Sn and P into Ge. Both the activation of P and the formation of GeSn are performed during a single-step flash lamp annealing for 3 ms. The band gap engineering in ultra-doped n-type Ge and GeSn alloys is theoretically predicted by density functional theory and experimentally verified using ellipsometric spectroscopy. We demonstrate that both the diffusion and the segregation of Sn and P atoms in Ge are fully supressed by ms-range non-equilibrium thermal processing. This work is partially supported by the National Science Centre, Poland, under Grant No. 2016/23/B/ST7/03451.

B.P.6
17:30
Authors : Juanmei Duan1,2, M. Helm1,2, W. Skorupa1, S. Zhou1, S. Prucnal1
Affiliations : 1Helmholtz-Zentrum Dresden-Rossendorf, Institute of Ion Beam Physics and Materials Research, Bautzner Landstrasse 400, D-01328 Dresden, Germany 2Technische Universität Dresden, D-01062 Dresden, Germany

Resume : Semiconductors with ultra-high doping level are attractive for the near- and mid-infrared plasmonics. The III-V compound semiconductors are characterized by high electron mobility and low electron effective mass, where the plasma edge can be tuned by tailoring the doping level. In this work, we present the formation of heavily doped p- and n-type GaAs utilizing ion implantation of Te, S and Zn, followed by sub-second annealing. We demonstrate that both the millisecond range flash lamp annealing (solid phase epitaxy) and nanosecond range pulsed laser annealing (liquid phase epitaxy) are able to recrystallize the implanted layers and electrically activate dopants. The carrier concentration in the heavily doped p- and n-type GaAs is in the range of 1019~1020 cm-3. The plasmonic properties of implanted and annealed GaAs samples were investigated by Fourier transform infrared spectroscopy (FTIR) and Raman spectroscopy. The obtained GaAs films display a room-temperature plasma frequency above 2200 cm-1, which makes GaAs attractive for sensing in the mid-infrared spectral range.

B.P.7
17:30
Authors : Haena Yim1, So Yeon Yoo1, and Ji-Won Choi1,2*
Affiliations : 1 Center for Electronic Materials, Korea Institute of Science and Technology, Seongbuk-gu, Seoul 02792, Republic of Korea 2 Nanomaterials Science and Engineering, Korea University of Science and Technology, Daejeon 34113, Republic of Korea

Resume : The dielectric materials, which is one of the important components for capacitors and transistor, is required to be miniaturized, flexible, light, and show high capacitance. However, the dielectric permittivity of commercialized material such as BaTiO3 shows a continuously decreasing tendency as decreasing thickness due to the size-effect. Recently, there are several studies on two-dimensional (2D) nanosheet materials because of their great dielectric properties in nanometer scale. Also, these 2D dielectrics films doesn’t required post-annealing because of its single crystalline nature. However, there are no reports about the single-layer properties. Therefore, we synthesis dielectric nanosheets with formula of Sr2Nb3O10 and deposited monolayer by Langmuir-Blodgett deposition method. We measured dielectric and electrical properties of single-layer of Sr2Nb3O10 through in-situ I-V measuring and impedance analyzer. Also, structural properties were characterized by high-resolution transmission electron microscopy (HR-TEM) and atomic force microscopy (AFM).

B.P.9
17:30
Authors : Takahiro Tsukamoto; Minoru Wakiya; Kazuaki Haneda; Nobumitsu Hirose; Akifumi Kasamatsu; Toshiaki Matsui; Yoshiyuki Suda
Affiliations : The University of Electro-Communications; Tokyo University of Agriculture and Technology; National Institute of Information and Communications Technology

Resume : Resonant tunneling diodes (RTDs) can be used for high frequency oscillation circuits as a negative differential resistance. GeSiSn is a notable group IV material for forming quantum well structures because it can modulate the bandgap independent from the lattice constant, which can modulate the potential barrier height of the band offset with low-defects. In this study, we designed lattice-matched GeSiSn/Ge electron-tunneling double-barrier RTDs. The GeSiSn/Ge RTD structure was formed using a sputter epitaxy method on n-type Ge (001) substrates. The Sn content of the fabricated GeSiSn layer was about 8%. The theoretical band offset of the fabricated GeSiSn/Ge heterojunction is about 0.2 eV in a conduction band. A GeSiSn/Ge quantum well structure was observed by a transmission electron microscope. A highly crystalline GeSiSn/Ge hetero epitaxial layer was obtained. We obtained the characteristics of the fabricated lattice-matched GeSiSn/Ge RTD devices. Different quantum well widths of about 1.4, 1.7, and 2.2 nm were prepared. A negative differential resistance was clearly obtained. As the quantum well width increased, the current density and the resonance voltage decreased. The dependence of the well widths on the RTD characteristic was in good agreement with typical RTD device characteristics. We successfully demonstrate that a group IV lattice-matched quantum well structure can be achieved using GeSiSn and that this technique can be applied to the formation of quantum effect devices composed of group IV materials. Acknowledgements: This research and development work was supported by JSPS KAKENHI Grant Numbers JP19K04487 and MIC/SCOPE #165103005. This work was partly carried out in the Advanced ICT Devices Lab in NICT.

B.P.10
17:30
Authors : L. Di Gaspare 1, L. Persichetti 1, F. Fabbri 2, A. Ruocco 1, A. M. Scaparro 1, A. Notargiacomo 3, A. Sgarlata 4, M. Fanfoni 4, V. Miseikis 5, C. Coletti 5, and M. De Seta 1
Affiliations : (1) Dipartimento di Scienze, Università di Roma Tre, Rome, 00146, Italy; (2) NEST, Istituto Nanoscienze ? CNR, Scuola Normale Superiore, Piazza San Silvestro 12, I-56127 Pisa, Italy; (3) Institute for Photonics and Nanotechnology, Via Cineto Romano 42, 00156, CNR-Rome, Italy; (4) Dipartimento di Fisica, Università di Roma ?Tor Vergata?, Via Della Ricerca Scientifica, 1- 00133 Roma, Italy; (5) Center for Nanotechnology Innovation @NEST, IIT, Piazza San Silvestro 12, 56127 Pisa, Italy

Resume : Graphene grown by chemical vapor deposition (CVD) on Ge surfaces is a promising route for unlocking graphene potential by the development of a metal-free deposition technique compatible with the CMOS technology [1]. However, the exploitation of CVD-grown graphene/Ge for device-oriented applications is still hindered by a problematic understanding of the complex interplay between the quality and morphology of the graphene and alterations in the morphology of Ge surface produced by graphene growth [2]. Here, through the accurate control on the growth temperature we established a one-to-one correlation between structural changes occurring at the atomic scale in graphene and the nanoscale morphology of Ge(001) and Ge(110) oriented surfaces. [3]. By combining scanning electron, atomic-force and scanning tunneling microscopies with Raman and X-ray photoelectron spectroscopies, we find that, close to the Ge melting point, small variations in the deposition temperature dramatically affect the quality of the graphene adlayer. By decreasing the growth from 930 °C to 910 °C we observe an evolution from a flat and almost defect-free graphene layer to a more wrinkled and defective graphene. The abruptness of the temperature behavior observed can be consistently explained by the incomplete surface-melting behavior of Ge and indicates that the quasi-liquid Ge layer formed close to 930 °C is fundamental to obtain high-quality graphene explaining the highly diverse quality of the graphene layers grown using nominally the same conditions, as reported in literature. [1] J-H Lee, et al. Science 344 (2014) 286. [2] AM Scaparro, et al. ACS Appl. Mater. & Interfaces 8 (2016) 33083. [3] L Persichetti, et al. Carbon 145 (2019) 345

B.P.11
17:30
Authors : P.A.Caban1, J.Gaca1, M.Wojcik1, P.Michalowski1, P.Ciepielewski1, M.Mozdzonek1, D. Teklinska1, E. Dumiszewska1, P.Firek2, M. Godlewski3, J.M.Baranowski1
Affiliations : 1 Institute of Electronic Materials Technology, Warsaw, POLAND 2 Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, Warsaw, POLAND 3Institute of Physics polish Academy of Science, Warsaw, Poland

Resume : Boron nitride films are usually grown epitaxially by MOVPE method. Triethylborone (TEB) and ammonia (NH3) can be applied as a precursor gases. In the experiment the growth was performed at the temperature and pressure of 10500C and 400mbar respectively what indicates self-terminated growth mode. As a result very thin (2nm) BN films with atomic smooth surfaces were grown. Structural properties of BN layers grown directly on the Al2O3, AlOxNy/Si and Al2O3/Si substrates were investigated. The measurements techniques used for investigation of the grown BN films involved SIMS, ATR spectroscopy, XRR, Raman and XPS. SIMS measurements revealed fluctuation of BN for Si substrate and diffusion of Si thought AlOxNy into BN layer. The advantage of Al2O3 buffer layer over AlOxNy was confirmed. This work was supported by the European Union’s Horizon 2020 research and innovation program under grant agreement No 785219

B.P.12
17:30
Authors : Seung-Hyub Baek
Affiliations : Korea Institute of Science and Technology

Resume : A biometrics-based authentication system has attracted a great attention owing to its relatively high-security level and convenience. Current fingerprint recognition systems do not meet the required security level: optical sensors are hard to miniaturize and easily deceived, and capacitive detectors often fail to recognize the patterns by contamination. The ultrasound technology with pMUT is one of the most promising technologies to realize such a highly-secure biometrics-based authentication system for mobile electronics. The performance of pMUT is directly determined with the electromechanical property of the piezoelectric layer. However, using conventional piezoelectric materials such as AlN, ZnO, and PZT, it is difficult to generate high power ultrasound that can penetrate into the skin to see veins. Therefore, it is highly desirable to integrate single crystalline relaxor-ferroelectrics, so-called giant piezoelectric materials, on Si substrate. In this talk, I will discuss the issues on the epitaxial integration of Pb(Mg,Nb)O3-PbTiO3 thin films on Si.

B.P.13
17:30
Authors : B. Salem1, M. A. Mahjoub1, T. Haffner1, Y. Guerfi1, S. Labau1, E. Eustache1, J. Aubin2, J. M. Hartmann2, T. Baron1, G. Ghibaudo3, B. Pelissier1, F. Bassani1
Affiliations : 1 Univ. Grenoble Alpes, CNRS, LTM, 38054 Grenoble Cedex 9, France ; 2 Univ. Grenoble Alpes, CEA, LETI, 17 rue des Martyrs, 38054 Grenoble Cedex 9, France; 3 Univ. Grenoble Alpes, IMEP-LaHC, 38016 Grenoble, France.

Resume : Germanium Tin (Ge1-xSnx) alloys are promising for use in high performance, low-power consumption MOS devices. By varying the Sn composition x, the GeSn bandgap can be tuned and high carrier mobilities achieved. Moreover, GeSn has a direct and low band gap for Sn contents > 8%, which is desirable for optoelectronic devices such as lasers and tunnel-field effect transistors. Furthermore, the smaller effective masses of charge carriers makes GeSn a suitable channel material in MOSFETs. The optimization and the control of the interface state density between high-k dielectrics and GeSn is mandatory, then. We therefore evaluated the impact of various wet treatments on the electrical performance of Ge0.9Sn0.1 p-MOS capacitors. Different wet protocols calling upon acid and basic solutions were evaluated. After these wet treatments, the surface roughness of Ge0.9Sn0.1 was characterized by atomic force microscopy and its chemical nature by X-ray photoelectron spectroscopy. Then, Al2O3 layers were deposited at 250°C by ALD on Ge0.9Sn0.1 layers after various surface preparations. After that, the chemical depth profile of Al2O3/GeSn stacks were investigated using parallel angle resolved XPS. Al2O3/GeSn depth profiles showed a high quality interface for HF then (NH4)2S treatments. Finally, capacitance-voltage (C-V) measurements combined with theoretical calculations were performed to extract the interface trap density, i.e. the Dit, in each type of Al2O3/ Ge0.9Sn0.1 p-MOS capacitor.

B.P.14
17:30
Authors : N. Armani, E. Achilli, M. Calicchio, G. Abagnale, F. Annoni, M. Cornelli, G. Timò, L. Nasi
Affiliations : N. Armani, E. Achilli, M. Calicchio, G. Abagnale, F. Annoni, M. Cornelli, G. Timò Ricerca sul Sistema Energetico – RSE, Strada Torre della Razza, Piacenza (Italy); L. Nasi IMEM-CNR Institute, Parco Area delle Scienze 37/A, 43124 Parma (Italy).

Resume : One of the main interests on the ternary SiGeSn semiconductor lies in its utilization for high efficiency III-V/SiGeSn/Ge quadruple junction solar cells and for the integration of III-V compounds with silicon: these features make it interesting both for microelectronic and photovoltaic applications. In this work, the SiGeSn ternary compound has been grown directly on Ge substrates in a modified AIX 2800G4 MOVPE reactor, by using germane, disilane and tin-tetrachloride at growth temperature around 490°C. Lattice matched materials, with thicknesses up to 1500 nm, have been grown and characterized by High Resolution X-Ray Diffraction (HRXRD), Scanning-Transmission Electron Microscopy (SEM and TEM) coupled with energy dispersive X-ray analysis (EDX), and Secondary Ion Mass spectroscopy (SIMS). High quality crystalline materials, Tin precipitates free have been obtained with low mosaicity and without extended defects. High resolution TEM observations show sharp SiGeSn/Ge interfaces. The Si and Sn incorporation has been determined by combining HRXRD, SIMS and TEM-EDX analyses. SIMS profiles show non homogenous Si concentration profiles; this behaviour has been correlated to Si/Sn composition ratio and to strain by the simulation of the HRXRD Omega-2 Theta profiles.

B.P.15
17:30
Authors : N. Arutyunov (1, 2, 3) M. Elsayed(1), R. Krause-Rehberg(1), V. Emtsev(2), N. Abrosimov(4), G. Oganesyan(2), V. Kozlovski(5)
Affiliations : (1) Martin Luther University Halle, Department of Physics, 06120, Halle, Germany; (2) Ioffe Physico-Technical Institute, 194021, St. Petersburg, Russia; (3) Inst. Ion-Plasma&Laser Technology (Institute of Electronics), 700170, Tashkent, Uzbekistan; (4) Leibniz Institute for Crystal Growth, D-12489, Berlin, Germany; (5) St. Petersburg State Polytechnical University, 195251, St. Petersburg, Russia

Resume : The fidelity of quantum computing is known to be affected by a shell of atoms containing 209-Bi qubit forming centers in natural silicon whereas a direct data on local electron/spin densities in the crystal open volume surrounding 209-Bi ion core and involving 29-Si atoms is lacking. Meanwhile, an admixture of positron to the spin/electron density of 209-Bi impurity center allows one to obtain such information by detecting 2γ – annihilation of (e+e−) pairs entangled with the polyelectron system of Bi impurity atom. Having applied positron annihilation lifetime spectroscopy, for the first time we have observed paradoxical decrease of probability of 2γ–annihilation of (e+e−) pairs per unit time with the increase of number of electrons contacting positron at 209-Bi impurity centers having both Td and D3d symmetry. This effect to be governed by spin-orbit field of 209-Bi and by involvement of 29-Si atom(s) is interpreted as an increase of number of (e+e−) pairs in the polyelectron system with parallel spins whose decay on two γ–quanta is prohibited by selection rules. Enormously large cross-section of localization of positron was found to be equal to ~ (1.3–1.7) ×10(−13) cm(2) (ΔT~ 295 to ~ 25 K). The picture looks as if the admixture of the charge-even states of (e+e−) pairs to the polyelectron in the spin-orbit field of Bi center decreases probability of long-lived 2γ–decay, whereas the charge-odd states of (e+e−) pairs suppress the contribution of short-lived singlet (e+e− pairs) to the resulting probability of 2γ–annihilation. The effects observed are discussed in the light of current reconsidering of a whole conception of formation of the positron-sensitive vacancy-Group-V-impurity centers in Si.

B.P.16
17:30
Authors : Jakub Skibinski, Mateusz Grybczuk, Tomasz Wejrzanowski, Emil Tymicki, Teck Leong Tan
Affiliations : Warsaw University of Technology, Faculty of Materials Science and Engineering, Woloska 141, 02507 Warsaw, Poland; Institute of Electronic Materials Technology, Wolczynska 133, 01919 Warsaw, Poland; Agency for Science, Technology and Research, Institute of High Performance Computing, 1 Fusionopolis Way, #16-16 Connexis, 138632, Singapore;

Resume : Within these studies the influence of materials properties on the effective properties of piezoresistive sensor is analysed by application of Finite Element Method (FEM). In particular, resistivity changes induced by sensor deformation is modelled as a function of external pressure, materials properties and geometry of the sensor elements. Various materials properties have been assumed basing on atomic scale simulation predictions. The initial part of simulations incorporates simple, cantilever geometry, which is also used in experimental studies of materials properties. Such strategy allowed for verification of the model and further design of more sophisticated shapes. The results of these investigations enable to design geometry of the device for different materials dedicated to detection of specific range of pressure.

B.P.17
17:30
Authors : R. Plugaru,1 S. Vulpe,1 E.Vasile,2 N. Plugaru,3
Affiliations : 1) National Institute for R&D in Microtechnologies-IMT Bucharest, Erou Iancu Nicolae 126 A, 077190 Voluntari, Romania; 2) University “Politehnica”of Bucharest, Faculty of Applied Chemistry and Material Science, Department of Oxide Materials and Nanomaterials, Gh. Polizu 1-7, 011061 Bucharest, Romania; 3) National Institute of Materials Physics, Atomistior 405 A, Magurele, Ilfov, 077125, Romania

Resume : Physical phenomena which emerge at semiconductor oxide interfaces, such as the formation of two- dimensional electron gas, with high electron density and mobility, are presently investigated for novel electronic devices. Here we explore the influence of the interface states on charge photogeneration, accumulation and transfer in ultrathin SiH/Si and SiH/Si/ZnO:Al layered structures. The structure and composition of the stacks were investigated by HRTEM. The (pulsed) I-V and C-V measurements were performed in dark and under light excitation conditions. First principles calculations on systems consisting of 2D Si layers on a hydrogenated Si (100) substrate have been performed in order to determine the energetically favourable atomic arrangements and to look at the charge density distribution in the depth of the interface region. Our results show that in the ionic relaxed systems the hydrogen atoms migrate from the substrate surface into the 2D Si monolayer network. A significant gradient of electronic density is present in the structures, with a maximum situated in the plane of 2D Si layers. Experimentally, we determined that p-SiH/Si and p-SiH/Si/ZnO:Al structures demonstrate higher photoresponsivity, particularly observed in the I-V and C-V characteristics of p-SiH/Si layers. The carriers density is higher in the n-SiH/Si structures than in the n-SiH/Si/ZnO:Al, in dark and under light excitation. The results suggest that the SiH/Si system could exhibit topological properties.

B.P.18
17:30
Authors : Yan Hua Huang1,2,3, Clement Porret3, Andriy Hikavyy3, Gianluca Rengo2,3, Lucas Petersen Barbosa Lima4 , Rami Khazaka4, David Kohen5, Joe Margetis5, John Tolle5, Toshiyuki Tabata6, Fulvio Mazzamuto6, Marc Heyns2,3 and Roger Loo3
Affiliations : 1 National Tsing Hua University, No. 101, Section 2, Kuang-Fu Road, Hsinchu 300, Taiwan 2 K.U. Leuven, Celestijnenlaan 200D, B-3001 Leuven, Belgium 3 Imec vzw, Kapeldreef 75, B-3001 Leuven, Belgium 4 ASM, Kapeldreef 75, 3001 Leuven, Belgium 5 ASM America, 3440 East University Drive, Phoenix, Arizona 85034, USA 6 SCREEN-LASSE, 14-38 Rue Alexandre, 92230 Gennevilliers, France

Resume : High series resistances become one of the dominant parasitics limiting the performance of modern transistors. Growing source/drain materials (S/D) in confined areas with extremely high active doping concentrations is key to continue MOSFET scaling. Unfortunately, dopants activation typically reaches a maximum for a defined impurity level. Incorporating more dopants degrades the electrical and structural material properties. Moreover, S/D often need to be grown on non-ideal surfaces, defined by former processing steps and for which the pre epi clean thermal budget is limited. This can cause material relaxation and defectivity. Extrinsic solutions are required to boost dopants activation and improve S/D and contact properties. In this work, we investigate the impact of different post epitaxy treatments on SiGe:B epi materials, including rapid thermal and laser anneals. The SiGe:B epi layers used for this study exhibit active and total B concentrations of ~ 2x1020 cm-3 (underestimated, estimated from Rs and XRR) and 4x1020 cm-3 (SIMS), respectively. Using appropriate excimer laser anneal conditions allows for a dramatic (~ 50%) reduction in resistivity, combined with a limited diffusion of the dopants thanks to the application of ultra-short (ns) laser pulses. However, carriers’ activation is metastable and may be hindered by subsequent steps in a device processing flow. For this reason, we also present a systematic deactivation study to clarify the benefits of this approach.

B.P.19
17:30
Authors : Johannes Ender, Roberto Orio, Simone Fiorentini, Viktor Sverdlov
Affiliations : Christian Doppler Laboratory for Non-Volatile Magnetoresistive Memory And Logic; Christian Doppler Laboratory for Non-Volatile Magnetoresistive Memory And Logic; Christian Doppler Laboratory for Non-Volatile Magnetoresistive Memory And Logic; Christian Doppler Laboratory for Non-Volatile Magnetoresistive Memory And Logic

Resume : Continuous down-scaling of semiconductor devices as it is being done for the last decades will come to a halt due to increasing dynamic and stand-by power consumption. Therefore, alternative technologies have to be investigated. Besides charge, the spin is also an inherent property of the electron that can be exploited for digital applications. Magnetic tunnel junctions (MTJ), formed by two ferromagnetic layers separated by a tunnel barrier, are the key element of magnetoresistive random access memory (MRAM). Their parallel and anti-parallel arrangement of the magnetization in the ferromagnetic layers and the corresponding low and high resistivity state make this spin-based technology a feasible energy-efficient and non-volatile alternative to charge-based memories. In order to design these spin-based devices, demanding simulations have to be performed to calculate the magnetization dynamics of the ferromagnetic layers. Large-scale micromagnetics simulations using the finite element method require special care, due to effective field evaluations that have to be performed at every time step. We show how available open source libraries can be used for a highly scalable implementation of the hybrid FEM-BEM approach. Parallelization using distributed-memory techniques and efficient handling of dense matrices using matrix compression are part of the computational machinery to efficiently solve the Landau-Lifshitz-Gilbert equation for the magnetization dynamics.

B.P.20
17:30
Authors : Simone Fiorentini, Roberto Orio, Johannes Ender, Viktor Sverdlov
Affiliations : Christian Doppler Laboratory for Nonvolatile Magnetoresistive Memory and Logic (TU Wien); Christian Doppler Laboratory for Nonvolatile Magnetoresistive Memory and Logic (TU Wien); Christian Doppler Laboratory for Nonvolatile Magnetoresistive Memory and Logic (TU Wien); Christian Doppler Laboratory for Nonvolatile Magnetoresistive Memory and Logic (TU Wien);

Resume : The miniaturization of integrated circuits is coming to a saturation due to increased stand by power and leakages. An attractive path to avoid these issues is to introduce non-volatility: spin-transfer torque (STT) magnetoresistive random access memory (MRAM) is a viable candidate. STT-MRAM is primarily composed of two ferromagnetic layers separated by an oxide layer, where the resistance difference between the parallel and antiparallel magnetization configurations characterizes the two states of the bit. The switching between the two states can be achieved by having a current flow through the structure. Simulations of these devices is usually performed with the torque computed approximately by assuming a position-independent electric current density through the structure. For high values of the tunneling magnetoresistance (TMR), this description is not accurate anymore, and one needs to solve the spin and charge drift-diffusion equations in the whole structure self-consistently. We compute the switching time distribution obtained within the self-consistent model and compare it to the switching times from the model with the fixed current density. We show that, provided that the current is appropriately adjusted, the simplified model can mimic the correct switching time distribution even in the case of high TMR.

B.P.21
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Session IV: III-V materials & material transfer : Giovanni Isella
09:00
Authors : Cezar B. Zota, Clarissa Convertino, Kirsten Moselund, Lukas Czornomaz
Affiliations : IBM Research - Zurich

Resume : High-electron mobility III-V semiconductors, ranging from InP, GaAs and the InGaAs system, have been widely studied as replacements for the n-type channel material in CMOS technology, where they may offer increased drive currents at reduced drive bias. While III-Vs are also widely used in standard HEMT technology for high-speed and mm-wave applications, as well as in photonics applications, integration on Si substrates remains challenging. The opportunities from such integration schemes are several, e.g. utilization of existing infrastructure and methods established by Si technology, reduction of costs and enabling of new functionalities. In particular, monolithically integrated III-V RF-devices with Si CMOS, for instance performing digital signal processing, could improve upon the functionality currently supplied by Si RF-CMOS technology. Several challenges must be met to successfully integrate III-V devices on Si, e.g. the transfer of a complex heterostructure onto a Si substrate without significant loss of carrier mobility, as well as the utilization of a Si CMOS-compatible process flow. In this work, we demonstrate an integrated III-V-on-CMOS technology platform, including a wide range of devices. In particular, we show high-performance logic FETs, high-frequency MOSHEMTs with record performance, as well as optical modulators, all integrated on Si substrates, including demonstrations of 3D sequential integration on Si CMOS.

B.IV.1
09:30
Authors : Baranov A.I.1, Kudryashov D.A.1, Morozov I.A.1, Uvarov A.V.1, Vasiliev A.A.1, Zelentsov K.S.1, Gudovskikh A.S.1,2
Affiliations : 1St Petersburg Academic University of RAS, 194021 St Petersburg, Russia. 2St Petersburg Electrotechnical University "LETI", 197376 St Petersburg, Russia.

Resume : The growth of planar GaP layers on silicon wafers is challenge for nanoelectronics since it will open possibilities to create high-efficiency multi-junction solar cells on Si. On the other hand, terrestrial photovoltaics require high throughput technology for mass-production. Nowadays, the method of plasma-enhanced atomic-layer deposition are successfully applied to grow GaP on Si. It was demonstrated that increase of hydrogen plasma power leads to transformation from amorphous to microcrystalline structure of GaP layers and a formation of thin defect layer in Si wafer near to interface GaP/Si, but bulk properties of silicon wafers are not deteriorated. In the next stage, influence of RF plasma content on GaP/Si heterojunction is studied. Recently, an enhancement of crystalline properties of GaP layers was demonstrated with an additional argon plasma surface activation step before trimetylgallium deposition step. In the work, we study electronic and defect properties of GaP/n-Si heterojunctions where thin GaP layers are grown with and without additional argon plasma step. For this purpose, Schottky diodes were formed to apply different capacitance methods (capacitance-voltage characteristic, admittance spectroscopy, deep-level transient spectroscopy).

B.IV.2
09:45
Authors : O.V. Kolosov*, M. Mucientes, L. Forcieri, P. Jurczak, M. Tang, K. Lulla, Y. Gong, S. Jarvis, H. Liu, and T. Wang
Affiliations : O.V. Kolosov*, M. Mucientes, L. Forcieri, S. Jarvis Physics Department and Materials Science Institute, Lancaster University, LA1 4YB, UK *o.kolosov@lancaster.ac.uk P. Jurczak, M. Tang, K. Lulla, Y. Gong, S. Jarvis, H. Liu, Department of Electronic and Electrical Engineering, University College London, London WC1E 7JE, UK Y. Gong, T. Wang Department of Electronic & Electrical Engineering, University of Sheffield, Sheffield, S1 3JD

Resume : Merging unique performance of compound semiconductor (CS) III-V materials in optoelectronics, high frequency and power devices with mature Si manufacturing is a holy grail of modern semiconductor technology. The difference between lattice constants, processing, and chemistry are just a few major challenges to be resolved. With practically non-existing methods for studying nanoscale physical properties of these buried structures, we developed a new concept for fast and efficient 3D nanoscale resolution quantitative mapping of physical properties of CS materials and devices. We combine novel nano-sectioning using variable energy Ar ion beam targeted at the edge of the sample to create a perfectly flat oblique near-atomic flat section through all layers of interest, and the material sensitive scanning probe microscopy (SPM), to reveal 3D morphology, composition, strain and crystalline quality via local physical properties – mechanical and piezoelectric moduli, nanoscale heat conductance, workfunction and electrical conductivity. We can observe the propagation of antiphase domains (APD) from the GaAs-Si interface through the 3D structure, reporting for the first time APD effect on electronic properties of multiple quantum wells that are electrically short the structure evident on charge distribution nanomaps. In GaN nanowires, we directly observe NW/Si substrate interface, and unexpectedly find the in-NWs domains of the opposite polarity via piezoelectric moduli maps. The novel paradigm will make a disruptive change on how 3D structure and physical properties of CS and microelectronics materials and devices are currently studied.

B.IV.3
10:00
Authors : Laurent Michaud, Pierre Montméat, Clément Castan, Frank Fournel, Samuel Tardif, François Rieutord
Affiliations : Univ. Grenoble Alpes, CEA, LETI, 38000 Grenoble, France ; Univ. Grenoble Alpes, CEA, LETI, 38000 Grenoble, France ; Univ. Grenoble Alpes, CEA, LETI, 38000 Grenoble, France ; Univ. Grenoble Alpes, CEA, LETI, 38000 Grenoble, France ; Univ. Grenoble Alpes, CEA, IRIG, 38000 Grenoble, France ; Univ. Grenoble Alpes, CEA, IRIG, 38000 Grenoble, France

Resume : Strain engineering is a widespread and effective method in microelectronic to tune semi-conductors properties. For example, applying elastic strain can increase charge carriers’ mobility in silicon based transistors [J. Li et al , 2003]. Our group has developed a new approach to prepare strainable Si thin-films, using transfer on a flexible polymer substrate. Typical Si film thickness range between 20 and 200 nm, over a 200 mm diameter [P. Montméat et al. 2016]. The flexible polymer substrate enables mechanical deformation of the silicon thin film. Moreover, at the nanometric scale, silicon can reach several percent of elastic strain [H. Zhang et al., 2016]. The work presented here describes how ultra-thin monocrystalline silicon films are transferred on different polymer substrates. We also performed tensile tests on resulting samples using uniaxial tensile stage and bulge test. Full strain tensor and crystal orientation were measured using X-rays Laue micro-diffraction at ESRF beamline BM32. In situ measurements over macroscopic areas showed that a high homogeneous strain (>1%) was achievable on a macroscopic area in a silicon on polymer film using external uniaxial or biaxial load. In addition, mechanical coupling between the flexible substrate and silicon film was studied. These promising results should allow us to reach even higher strain level in silicon or in other semi-conductor materials.

B.IV.4
10:15
Authors : Seong-Keun Cho(a), Tae-Yeon Cho(a), Juwhan Ryu(b), Jae Heung Lee(a)
Affiliations : (a) Chemical Materials Solutions Center, Korea Research Institute of Chemical Technology, Daejeon, 34114, Korea (b) Department of Polymer Science and Engineering, Chungnam National University, Daejeon 34134, Korea

Resume : Hydrogenated amorphous silicon nitride films (a-SiNx:H) have been investigated as gas barrier films for a long time. In this paper, a-SiNx:H films grown by roll to roll PECVD with various process conditions at low temperature were investigated from the point of view of correlation between microstructure and gas barrier properties. The chemical compositions and bond densities of the films were confirmed using FTIR and other analytical techniques and were compared by WVTR. Under the optimum condition, the WVTR of a-SiN:H single-layer on PET which is coated with organic planarization layer was reached down to 0.003g/m2·day and showed excellent mechanical flexibility with the failure bending radius of below 2mm.

B.IV.5
10:30 Coffee break    
 
Session V: GeSn : TBD
11:00
Authors : a) Detlev Grützmacher, D.M. Buca, N. von den Driesch, Daniela Stange, Dennis Rainko b) Moustafa Elkurdi, c) Jean Michel Hartmann d) Zoran Ikonic
Affiliations : a) Institute for Semiconductor Nanoelectronics., PGI-9, Forschungszentrum Jülich, and JARA-Institute Green IT, FZ-Jülich and RWTH Aachen, PGI-10, 52425 Jülich, Germany b) Center for Nanoscience and Nanotechnology, C2N UMR 9001, CNRS, Universit´e Paris Sud, Universit´e Paris Saclay, 91120 Palaiseau, France c) CEA, LETI and Univ. Grenoble Alpes, 38054 Grenoble, France d)Pollard Institute, School of Electronic and Electrical Engineering, University of Leeds, Leeds LS2 9JT, UK

Resume : Optically pumped GeSn laser have been realized, thus alloying of group IV elements germanium (Ge) and tin (Sn) has a large potential to be a solution for Si-photonics, since a direct bandgap for Sn incorporations above ~9 at.% is obtained. The value of the bandgap can further be controlled by adding Si into the mix, which can be exploited for the formation of heterostructures for carrier confinement. However, a sufficiently large difference in energy ΔE between the indirect L-valley and the direct Г-valley is required to achieve room temperature lasing. Recently lasing was reported at 280K in GeSn alloys with Sn concentrations as high as 22,3%. Alternatively ΔE can be increased by adding tensile strain to the GeSn layers. Here we will discuss that an appropriate combination of Sn concentration and strain will be advantageous to tailor gain and temperature stability of the structures. A comprehensive characterization of multiple quantum well (MQW) structures, formed from active GeSn layers and SiGeSn claddings. Spectra of optically pumped µ-disc MQW laser taken at various optical pump power. The data reveal a lasing threshold at 20 K from light in/light out curves of 39 kW/cm2, evidencing the superiority of MQW structures over bulk layers. Moreover, GeSn layers with only 6% Sn have been transferred and encapsulated with SiNx layers to add up to 1.3% tensile strain to the GeSn layers. Microdisc lasers fabricated using this technology exhibit thresholds of 0.8 kW/cm2 for pulsed pumping and around 1 kW/cm2 for CW pumping, which is dramatic reduction compared to previously reported GeSn bulk laser. The maximal lasing temperature is around 60K. The potential of combining tensile strain and GeSn laser structures harbouring 8-12% Sn will be discussed.

B.V.1
11:30
Authors : Emily V. S. Hofmann (1)(2), Emilio Scalise (3), Felix Reichmann (1), Steven R. Schofield (2), Giovanni Capellini (1)(4), Leo Miglio (3), Neil J. Curson (2), Wolfgang M. Klesse (1)
Affiliations : (1) IHP – Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany; (2) London Centre for Nanotechnology, University College London, London, UK; (3) Dipartimento di Scienza dei Materiali, Università di Milano-Bicocca, Milan, Italy; (4) Dipartimento di Scienze, Università Roma Tre, Rome, Italy

Resume : The deposition of a few monolayers of tin (Sn) on germanium (Ge) presents intriguing pathways towards both the formation of Ge/GeSn/Ge multi-quantum-wells [1] as well as stanene, a Sn-based two-dimensional topological insulator [2]. However, detailed studies of the adsorption and nucleation properties of Sn on Ge surfaces remain limited. Here, we provide an atomic-scale description of the formation of sub- to closed monolayers of Sn on both Ge(100) and Ge(111) surfaces using scanning tunneling microscopy. For both surface orientations we confirm that room temperature deposition results in the partial incorporation of Sn atoms into top surface layer. Based on density functional theory simulations of the local density of states, contrasted with scanning tunneling microscopy and spectroscopy, we provide insights into the contribution of ejected Ge atoms on the chemical composition of the surface features observed. Finally, to achieve truly atomically abrupt Ge/Sn interfaces we aim to suppress immediate Sn incorporation upon adsorption by varying the Sn deposition rate and substrate temperature. Overall our results add to a deeper understanding of the first stages of Sn/Ge growth, from which optimized growth processes may be derived. References: [1] F. Oliveira et al., Appl. Phys. Lett. 107, 1 (2015). [2] Y. Fang et al., Scientific Reports 5, 14196 (2015).

B.V.3
11:45
Authors : Felix Reichmann (1), Emily Hofmann (1)(2), Giovanni Capellini (1)(3), Wolfgang Matthias Klesse(1)
Affiliations : (1) IHP – Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), Germany; (2) London Centre for Nanotechnology & Department of Electronic and Electrical Engineering University College London, London, UK; (3) Dipartimento di Scienze Università Roma Tre, Rome, Italy

Resume : While the Ge-Sn material system is a promising candidate for Si-CMOS compatible electronic and photonic devices [1], very few studies have been devoted to the fundamental understanding of the Sn/Ge heterointerface properties. To investigate the initial formation of the interface and the electronic structure, we have grown Sn for different monolayer (ML) coverages on Ge(001) under UHV conditions. The surface electronic structure has been investigated by angle-resolved photoelectron spectroscopy, supplemented by other characterization methods. We find that the initial formation of the Sn wetting layer is dominated by ad-dimers of Sn and that the Sn introduces at sub-ML coverage an upward band bending. Moreover, the metallic nature of the Ge(001) surface vanishes upon Sn deposition and then returns at ~4 MLs of Sn. This is accompanied by the appearance of a Sn-related feature at 1.1 eV below the Fermi level, whose origin is under scrutiny. Interestingly, we observed that Sn-Ge intermixing occurs even at room temperature and will discuss the influence of the Sn on the effective masses of the light- and heavy-hole bands. Overall our study helps to better understand the Sn/Ge(001) interface and should motivate similar investigations directed to (Si)GeSn. References: [1] S. Wirths et al., “Si-Ge-Sn Alloys: From Growth to Applications”, Prog. in Crys. Grow. and Char. of Mat., vol. 62, pp. 1-39, March 2016

B.V.2
12:00
Authors : Andrea Giunto, Bianca Patrahau, Laura J. Roset, Anna Krammer, Nicolas Tappy, Rajrupa Paul, Andreas Schüler, Anna Fontcuberta i Morral
Affiliations : Laboratory of Semiconductor Materials, École Polytechnique Fédérale de Lausanne; Laboratory of Semiconductor Materials, École Polytechnique Fédérale de Lausanne; Laboratory of Semiconductor Materials, École Polytechnique Fédérale de Lausanne; Solar Energy and Building Physics Laboratory, École Polytechnique Fédérale de Lausanne; Laboratory of Semiconductor Materials, École Polytechnique Fédérale de Lausanne; Laboratory of Semiconductor Materials, École Polytechnique Fédérale de Lausanne; Solar Energy and Building Physics Laboratory, École Polytechnique Fédérale de Lausanne; Laboratory of Semiconductor Materials, École Polytechnique Fédérale de Lausanne;

Resume : GeSn is a promising material for economically viable IR electro-optical devices, thanks to the possibility of monolithic integration on Si substrates. The substitutional incorporation of a few atomic percent of Sn allows to shift the direct bandgap of pure Ge past 1550 nm. Issues associated to the fabrication of GeSn thin films are the low solubility of Sn in Ge (< 1%at) at room temperature, and the large lattice mismatch (> 4.2%) of GeSn on Si. In this work, we present the growth of epitaxial GeSn thin films for IR photodetectors. Films are deposited on Si, Ge and graphene substrates through the use of magnetron co-sputtering. Different alloy compositions up to 10%at Sn are obtained by fixing the Ge target power and varying independently the Sn target power. We will show the potential of the sputtering technique to obtain high-quality crystalline GeSn below 300˚C, with thicknesses up to 500 nm. Characterizations include Raman spectroscopy, X-Ray diffraction, RBS, SEM and TEM imaging. Absorption coefficients and photoconductivity of the films with different Sn content will be presented as well as some proof-of-concept photodetectors.

B.V.4
12:15
Authors : P. Ščajev (1), S. Nargelas (1), P. Onufrijevs (2), A. Medvids (2), L. Grase (2), M. Andrulevicius (3), M. Skapas (4), K. Lyutovich (5), E. Kasper (5), H. H. Cheng (6)
Affiliations : (1) Institute of Photonics and Nanotechnology, Vilnius University, Sauletekio al. 3, LT 10257, Vilnius, Lithuania; (2) Institute of Technical Physics, Faculty of Materials Science and Applied Chemistry, Riga Technical University, P. Valdena 3/7, Riga, LV-1048, Latvia (3) Kaunas University of Technology, Barsausko str. 59, LT-50131, Kaunas, Lithuania (4) Center for Physical Sciences and Technology (FTMC), Vilnius, Lithuania (5) Universitat Stuttgart, Pfaffenwaldring 47, 70569 Stuttgart, Germany (6) Center for Condensed Matter Sciences and Graduate Institute of Electronic Engineering, National Taiwan University, Roosevlet Road No 1, Section 4, Taipei 10617, Taiwan

Resume : Group IV elements of silicon and germanium are basic materials for photo detection. Further extension of detection range to the mid-infrared region can be performed by few schemes. Among them, the all group IV alloy of germanium-tin (GeSn) based material has shown promising characteristics for near infrared. Therefore we focused our study on optoelectronic properties of thick Ge0.96Sn0.04 layers on silicon modified by powerful pulsed laser radiation for enhancement of solubility of Sn atoms. The main material parameters relevant for photo-detectors are carrier lifetime, diffusion coefficient and diffusion length. We employed contactless optical techniques as differential transmittivity, differential reflectivity, and light induced transient grating for their nondestructive determination in GeSn layer which was converted to graded-bandgap structure by Nd:YAG laser irradiation due to thermogradient effect. The TEM/EDS cross-section analysis, X-ray photoelectron spectroscopy, Raman and UV reflection spectra confirmed the increase of Sn atomic content at the surface by order of magnitude. The determined slow free carrier lifetimes by differential transmittivity were in 20-30 ns range and weakly dependent on excitation, whereas differential reflectivity provided faster decays due to surface recombination. Increase of differential reflectivity signal in strongly irradiated sample verified reduction of carrier mass in the direct GeSn bandgap by 3 times with respect to indirect one before irradiation. Latter bandgap conversion occurs approximately at 50 nm depth. Surface irradiation by 1064 nm laser for Sn redistribution by thermogradient effect did not induce appreciable changes of recombination parameters. The work was supported as part of the Program on Mutual Funds for Scientific Cooperation of Lithuania and Latvia with Taiwan project: GeSn-based photo sensor - from basic research to applications.

B.V.5
12:30 Lunch Break    
 
Session VI: 2D materials : TBD
14:00
Authors : Ageeth A. Bol
Affiliations : Eindhoven University of Technology

Resume : 2D materials have been the focus of intense research in the last decade due to their unique physical and chemical properties. This presentation will highlight our recent progress on the synthesis of two-dimensional transition metal dichalcogenides (2DTMDs) for nanoelectronics applications using atomic layer deposition (ALD). ALD is a chemical process that is based on self-limiting surface reactions and results in ultrathin films, with sub-nm control over the thickness and wafer-scale uniformity at low temperatures. ALD-grown 2DTMD films typically exhibit a high density of out-of-plane 3D structures in addition to the desired 2D horizontal layers. The presence of such 3D structures can hinder charge transport, which hampers device applications. In this work, we first investigated the growth mechanism of the 3D structures by extensive high resolution transmission electron microscopy analysis. We found that the fins typically originate at the grain boundaries in the 2D layers and that the grain orientation of adjacent 2D crystals play an important role in 3D structure formation. Furthermore, we found that the density of 3D structures can be suppressed by introducing a novel three step (ABC) ALD process, which involves the addition of an extra Ar and/or H2 plasma step (step C) to the conventional AB-type ALD process. This reduces the 3D structure density and consequently reduces the resistivity of the TMD film by an order of magnitude. Our work showcases the versatility of plasma-enhanced ALD for the controlled synthesis of transition metal dichalcogenide nanolayers, which can enable applications in nanoelectronics

B.VI.1
14:30
Authors : Antonio Di Bartolomeo*, Giuseppe Luongo, Francesca Urban, Alessandro Grillo and Filippo Giubileo
Affiliations : University of Salerno, Physics Department “E.R. Caianiello”, Salerno, Italy

Resume : The graphene/silicon (Gr/Si) junction has been the subject of intense research activity for both the easy fabrication and the variety of physical phenomena involved. It offers the opportunity to investigate new fundamental physics at the interface between a 2D semimetal and a 3D semiconductor, and holds promises for a new generation of graphene-based devices such as rectifiers, photodetectors, solar cells, and chemical-biological sensors. A Gr/Si junction with defect-free interface exhibits rectifying current-voltage characteristics, owing to the formation of a Schottky barrier as in traditional metal-semiconductor (M/S) Schottky diodes [1]. The vanishing density of states at the graphene Dirac point enables Fermi level tuning and hence Schottky barrier height modulation by a single anode-cathode bias. When the Gr/Si junction is used as a photodetector, graphene acts as the transparent pick-up electrode as well as the active material for light absorption and electron-hole generation and separation. Although most of the incident light is converted into photo-charge inside Si, the absorbance in graphene enables detection of photons with Si sub-bandgap energy through internal photoemission over the Schottky barrier [2]. Photo-charges injected over the Schottky barrier, under high reverse bias, can be accelerated by the electric field in the depletion region of the diode and cause avalanche multiplication by scattering with the Si lattice, thus enabling internal gain. The Gr/Si junction forms the ultimate ultra-shallow junction, which is an ideal device to detect light absorbed very close to the Si surface, such as near- and mid-ultraviolet. In this talk, I start with some key features the graphene/semiconductor heterojunction, then I present the electrical characterization and the photo-response of two types of graphene/Si devices, on flat [3,4] and nanotip-patterned [5] Si-substrate, respectively. Although due to different mechanisms, for both devices, I demonstrate a photo-responsivity exceeding is competitive with present solid-state devices. I will show that the high responsivity can be attributed to charges photogenerated in the surrounding region of the flat junction [5] or to the internal gain by impact ionization caused by the enhanced field near the nanotips [4]. [1] A. Di Bartolomeo, Graphene Schottky diodes: An experimental review of the rectifying graphene/semiconductor heterojunction, Physics Reports 606 (2016) 1-58 [2] A. Di Bartolomeo et al., Graphene-Silicon Schottky Diodes for Photodetection, IEEE Transactions on Nanotechnology 17 (2018) 8408514, 1133-1137 [3] A. Di Bartolomeo et al., Hybrid graphene/silicon Schottky photodiode with intrinsic gating effect, 2D Materials 4 (2017) 025075 [4] G. Luongo et al. Electronic properties of graphene/p-silicon Schottky junction, Journal of Physics D: Applied Physics 51 (2018) 255305 [4] A. Di Bartolomeo et al., Tunable Schottky barrier and high responsivity in graphene/Si-nanotip optoelectronic device, 2D Materials 4 (2017) 015024 [5] G. Luongo et al., I-V and C-V Characterization of a High-Responsivity Graphene/Silicon Photodiode with Embedded MOS Capacitor, Nanomaterials 7 (2017) 158

B.VI.2
15:00
Authors : Yun-Yuan Wang; Chih-Hsiang Hsiao; Chih-I Wu
Affiliations : Department of Electrical Engineering, Graduate Institute of Photonics and Optoelectronics, National Taiwan University, Taiwan R.O.C.

Resume : Transition metal dichalcogenides (TMDCs), especially MoS2, have been considered as highly scalable electronic materials to extend Moore’s law. Nevertheless, low mobility and high contact resistance still impose serious difficulties on TMDC electronics. In this research, we propose a novel WS2/MoS2 Van der Waals heterostructure field-effect transistor (FET), as next-generation device architecture. Compared to single MoS2 FET, this heterostructure can benefit from not only higher mobility (from 43.3 to 62.4 cm2V-1s-1) but also lower Schottky barrier height (from 120 to 52 meV). Such significant enhancement is mainly due to charge transfer effect across the heterostructure which is confirmed by both photoluminescence and electrical measurements. Moreover, a double heterostructure WS2/MoS2/WS2 was also investigated. The combination of two heterostructures with Van der Waals self-encapsulation can further boost the mobility up to 102.5 cm2V-1s-1 at room temperature and 204.3 cm2V-1s-1 at 30 K. This concept of heterostructure FET can also open a wide application in other 2D material electronics.

B.VI.3
15:15
Authors : Haena Yim1, So Yeon Yoo1, and Ji-Won Choi1,2+
Affiliations : 1 Center for Electronic Materials, Korea Institute of Science and Technology, Seongbuk-gu, Seoul 02792, Republic of Korea 2 Nanomaterials Science and Engineering, Korea University of Science and Technology, Daejeon 34113, Republic of Korea

Resume : The search for 2D high-k dielectric nanosheets materials have been actively researched due to a versatile properties such as high dielectric permittivity, solution processibility, and great thermal stability. In addition, the development of flexible and transparent electronics required the advanced dielectric materials. 2D Dion-Jacobson phase nanosheets have been shown high-k dielectric permittivity properties, which are undisturbed for the thickness, even for thickness down to 20 nm. Moreover, these nanosheets are transparent and don’t require to do a post annealing process, so 2D nanosheets can be deposited on flexible substrate. Here, we firstly demonstrate the effect of A-site modified Dion-Jacobson phases layered perovskites Sr2Nb3O10 nanosheets to enhance their dielectric properties and realize flexible dielectric thin films on polymer substrate in MIM structure. Oxide/metal/oxide multilayer electrodes are deposited as top and bottom electrodes, and the nanosheets thin films are grown by Langmuir-Blodgett method in room temperature. This new and simply fabricated high-k dielectric thin film can be a new tool to develop next-generation flexible electronics.

B.VI.4
15:30 Coffee break    
 
Session VII: Nanowires : TBD
16:00
Authors : Kais Daoudi1,2, Mounir Kaidi1,2, Di Zhang2,3, and Hussain Alawadhi1,2
Affiliations : 1 Applied Physics and Astronomy Department, University of Sharjah, Sharjah, United Arab Emirates. 2 Centre for Advanced Materials Research, Research Institute of Sciences and Engineering, University of Sharjah, Sharjah, United Arab Emirates. 3 Sustainable and Renewable Energy Engineering Department, University of Sharjah, Sharjah, United Arab Emirates.

Resume : The development of new synthesis techniques of various nanomaterials has spurred a huge interest from the scientific and engineering communities to understand the outstanding physical properties and their integration in various devices ranging from large area photovoltaic to nanoelectronics and nanosensors. Among these nanomaterials, silicon nanowires (SiNWs), offering an important surface to volumes ratios, have been extensively used in chemical or biological sensors. In this work we have successfully prepared vertically aligned and well controlled SiNWs using a metal assisted chemical etching (MACE) process. The evolution of the morphology and microstructure of the SiNWs have been investigated using scanning electron microscopy and atomic force microscopy. By varying the etching time, we were able to tune the SiNWs length from 5 to 12 µm. The large specific surface area of the SiNWs makes them a good candidate for surface-enhanced Raman spectroscopy (SERS) sensors. Hence, we covered the SiNWs surface by silver nanoparticles (Ag-NPs) to activate the SERS effect. The SERS of rhodamine 6G (R6G) has been investigated using Raman spectroscopy. AgNPs/SiNWs matrix shows significant higher Raman signal sensitivity than a planar framework of Ag nanoparticles adsorbed two dimensionally a flat silicon surface. A SERS detection limit of 10-8 M rhodamine in aqueous solution has been obtained. The observed SERS enhancement is believed to result from additional light harvesting enabled by the SiNWs morphology and by the ability of the Ag-NPs to absorb visible irradiation caused by various localized surface-plasmon-resonances, which in turn depend on the size and interdistance of the Ag-NPs.

B.VII.1
16:15
Authors : Awad Shabny,1 Francesco Buonocore,2 Massimo Celino,2 Jürgen Ristein,3 Jordi Arbiol,4 and Muhammad Y. Bashouti 1,5*
Affiliations : 1-Department of Solar Energy and Environmental Physics, Swiss Institute for Dryland Environmental and Energy Research, J. Blaustein Institutes for Desert Research, Ben-Gurion University of the Negev, Midreshset Ben-Gurion, Building 26, 8499000, Israel. 2-ENEA, C. R. Casaccia, via Anguillarese 301, 00123 Rome, Italy. 3-Universität Erlangen-Nürnberg, Chair of Laser Physics, Staudt-str. 1, 91058, Erlangen, Germany. 4-Institució Catalana de Recerca i Estudis Avançats (ICREA) and Institut de Ciència de Materials de Barcelona, ICMAB-CSIC, 08193, Bellaterra, CAT, Spain. 5-The IISe-Katz Institute for Nanoscale Science & Technology, Ben-Gurion University of the Negev, POB 653, Beer-Sheva Campus, Building 51, 8410501, Israel.

Resume : The surface properties of vapor–liquid–solid grown Silicon Nanowire (Si NW), has been recently a concern. One reason is due to the ability of the top-atoms to control highly the electronic properties of the Si NWs. Results from electronic characterization such Kelvin Probe Force Microscopy and X-ray Photoelectron Spectroscopies, show un-expected shift in the Si2p3/2 binding energy which represents the surface Fermi Level (SFL) at the Si NW. The SFL moves towards the midgap after exposing the hydrogen terminated Si NW to oxide conditions. Two main types of oxides have been found, sub-oxide (Si 1, Si 2, Si 3) and full oxide (Si 4), interestingly, the sub oxide found to produce trap states that lead to hysteresis effect in the I-V curve, while reaching full oxide state we found that the surface states decrease dramatically, and significant change is observed. In addition, transition from n to p conductivity and SFL shift is observed in case of annealing while no change is observed in room temperature oxidation. This mainly occurring due to breaking the water process production in time of oxidation, where the annealing is breaking the equilibrium and lead toward one direction reaction. By consuming electrons, hole accumulation layer at the surface lead toward n to p transition of the FET device-based Si NWs and SFL shift toward midgap due change in carrier concentration. Quantitative correlation between surface properties and nanomaterial functionality is done which can advance the development of hybrid Si NW-based device technologies.

B.VII.2
16:30
Authors : M. Gaidi, K. Daoudi, S. Coulambus and M. Shameer
Affiliations : University of Sharjah

Resume : In this work one-dimensional silicon nanowires (SiNWs) with well controlled size and length have been synthesized via a silver-assisted chemical etching method. A very fine and homogeneous dispersion of silver nanoparticles (3–5 nm) inside SiNWs films was carried out by dip coating process. An analysis of the electrical properties evolution of a series of SiNWs thin films doped with small amounts of Ag under pure air and air with 300 ppm CO is presented. Ag doping improves the sensitivity and selectivity for CO detection. The SiNWs/Ag NPs matrix shows significantly higher electrical sensitivity than a pure SiNWs framework. The microstructural and morphology of the silicon nanowires has been examined by X-ray diffraction and scanning electron microscopy. By Varying the etching time, we were able to tune the SiNWs length from 5 to 12 µm. We find that tan optimal 5 min etching time leads to the highest CO sensitivity. A very low detection limit of 10 ppm been obtained. The observed electrical sensitivity enhancement is believed to result from the electrons exchange between Ag and SiNWs surface.

B.VII.3
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09:00 Plenary Session (Main Hall)    
12:30 Lunch break    
 
Session VIII: Emerging applications : TBD
14:00
Authors : Thierry Taliercio
Affiliations : Univ Montpellier, CNRS, IES, UMR 5214, F-34000 Montpellier, France

Resume : Plasmonics is one of the best-suited approaches for photonics applications in the mid-infrared. Based on the concept of surface plasmon polaritons, electromagnetic waves strongly coupled to the collective oscillation of free carriers, plasmonics offers the possibility to enhance the light-matter interaction. Plasmonics is mainly based on gold but it was recently demonstrated that alternative materials, such as heavily-doped semiconductors (HDSC), can be favourably used in the mid-infrared spectral range, and be compatible with Si technology. In this work, we will present how HDSC can be used as sensor in the infrared range notably with surface enhanced spectroscopy obtained on periodic arrays of nano-antennas developed on an InAsSb/GaSb platform. These nano-antennas of Si-doped InAsSb alloy are able to sustain localised surface plasmon resonances (LSPR) used in sensing experiments exploiting the strong electric field enhancement appearing at the HDSC surface. Adjusting the carrier concentration in the HDSC by the doping level allows to control the value of the plasma frequency which is linked to the LSPR frequency. The smaller the plasma frequency, the smaller the LSPR frequency. The nano-antennas have been fabricated by optical lithography and wet etching. As expected, when changing the size and the shape of the nano-antennas it is possible to cover a large spectral range and to be sensitive to the polarization of the incident light. Additionally, monitoring the carrier concentration of the InAsSb, make possible to lead up the maximum field enhancement in the targeted spectral range of the biomolecular fingerprints.

B.VIII.1
14:30
Authors : Kevin Gallacher 1, Marco P. Fischer 2, Aaron Riede 2, Jacopo Frigerio 3, Giovanni Pellegrini 4, Michele Ortolani 5, Giovanni Isella 3, Alfred Leitenstorfer 2, Paolo Biagioni 4, Daniele Brida 2,6 and Douglas J. Paul 1
Affiliations : 1 School of Engineering, University of Glasgow, Rankine Building, Oakfield Avenue, Glasgow, G12 8LT, UK 2 Department of Physics and Center for Applied Photonics, University of Konstanz, D-78457 Konstanz, Germany 3 L-NESS, Dipartimento di Fisica del Politecnico di Milano, Via Anzani 42, 22100 Como, Italy 4 Dipartimento di Fisica, Politecnico di Milano, Piazza Leonardo da Vinci 32, 20133 Milano, Italy 5 Physics and Materials Science Research Unit, Université du Luxembourg, L-1511 Luxembourg

Resume : Plasmonic nanoantenna provide a technique to resonantly couple light to atoms or molecules at sub-optical wavelength scales to enhance the non-linear or quantum properties. At the visible and near infrared, metals such as Au and Ag provide high performance including 2nd and 3rd harmonic generation but can be too metallic for many applications at mid-infrared wavelengths. Doped semiconductors such as InP, InAs, InAsSb and Ge have been introduced providing tunable mid-infrared plasmonic platforms in the important molecular fingerprint region (6.7 to 20 µm) where molecular absorption spectroscopy has applications for security, point-of-care healthcare and environmental monitoring applications. Here we present doped Ge on Si plasmonic nanoantennas with 3rd order non-linear coefficients at mid-infrared wavelengths comparable to those of Au at visible and near infrared. The Ge was epitaxially grown on Si substrates using low energy plasma enhanced chemical vapour deposition. Antennas were fabricated using electron beam lithography and fluorine reactive ion etching with processes available in many silicon foundries. Third harmonic generation of Ge gap nanoantennas with lengths from 1 to 6 µm are presented for a constant 300 nm gap spacing. For samples with a plasmon wavelength of 9.7 µm pumped at 12 µm wavelength, clear 3rd harmonic generation is demonstrated at 4 µm with a cubic dependence on the pump power and a maximum conversion efficiency of 10^-5 for 3 µm long antenna arms.

B.VIII.2
14:45
Authors : Hyeon-Jun Lee1*, Katsumi Abe2
Affiliations : 1 Institute of Convergence, DGIST, Daegu 42988, South Korea (*E-mail: dear.hjlee@dgist.ac.kr); 2 Silvaco Japan Company, Ltd., Yokohama 220-8136, Japan

Resume : A wide range of studies have been conducted on operational stability under various stress conduction, over the past decade since the transparent oxide semiconductor device study began.1 Recent, the oxide semiconductors such as InGaZnOx based TFTs have been successfully employed in pixel driver circuitry for commercial display applications.2 However, a variety of defects are occurring due to long-term stability of oxide semiconductors. Typical of these are the threshold voltage shift by the constant gate bias and current ability drop by high voltage pulsed type signal at the drain.3 This degradation is due to the ionic bond that oxide semiconductors naturally have and various ways of improving their characteristics are currently under study. In this study, we have investigated the defect generation caused by the electrical signals applied to oxide semiconductors and the influence of an impact ionization in the active layer. Amorphous oxide semiconductor is selected as the channel material for the n-type oxide transistors which is realized on top of insulating silicon oxide/silicon substrate. A 150-nm-thick Mo gate electrode and a 200-nm-thick silicon dioxide gate dielectric were successively deposited by sputtering method and chemical vapor deposition, respectively. The Mo source and drain electrode was utilized and patterned by conventional lithography process. The variation of the static and transient currents in TFTs after high-voltage drain pulse signal was investigated by measuring the transfer curves experimentally and simulated using the technology computer aided design (TCAD) 2D simulator (ATLAS, Silvaco Inc.). Here we reports that the reduction of current ability due to "impact ionization" and its effect on various structures. The contribution of the impact ionization in oxide semiconductors is verified through the TCAD simulation, and it was confirmed experimentally the effect of the impact ionization according to the device stacking structures. In addition, we reports on the effects of drain-induced source barrier lowering4 phenomena in InGaZnOx TFTs with asymmetrical local defect states. This effect has generally been observed in TFT structures with short channels, whereas the present study discovered it in a long-channel device with asymmetrical local defects. This work was supported in part by the DGIST R&D Program of the Ministry of Science, ICT, and Future planning (19-NT-01) and in part by the Basic Science Research Program through the National Research Foundation of Korea (NRF) under Grant NRF-2018R1D1A1B07041075. References 1 Nomura, K. et al., Thin-film transistor fabricated in single-crystalline transparent oxide semiconductor. Science 300, 1269-1272 (2003). 2 Fortunato, E. et al., Oxide semiconductor thin-film transistors: a review of recent advances. Advanced Materials 24, 2945-2986 (2012). 3 Lee, H.-J. et al., Impact of transient currents caused by alternating drain stress in oxide semiconductors. Scientific Reports 7, 9782-9790 (2017). 4 Lee, H.-J. et al., Drain-Induced Barrier Lowering in Oxide Semiconductor Thin-Film Transistors with Asymmetrical Local Density of States, IEEE J. Elec. Dev. Soc. 6, 830-834 (2018).

B.VIII.3
15:00
Authors : Xanthippi Zianni
Affiliations : National and Kapodistrian University of Athens, Greece

Resume : Silicon is the most widely used and better known functional material. Nano- and hetero-structures have been used to improve the performance of Si-based devices. The specifications of future-generation devices require to use materials and structures with even higher efficiency and also IC compatible. Here, we discuss how nanoscale non-uniformity can provide improvement of multiple transport properties of semiconductor nanostructures and lead to efficient heat management and thermoelectric energy conversion at the nanoscale. We show that synergy of several effects can give simultaneous decrease of the thermal conductivity and enhancement of the electrical properties in nanostructures with geometrical and compositional non-uniformity [1,2,3]. It is shown that quantum effects and the presence of quasi-localized states can further enhance the thermoelectric efficiency and control heat conduction [4,5]. [1] ‘Synergy between defects, charge neutrality and energy filtering in hyper-doped nanocrystalline materials for high thermoelectric efficiency’, X.Zianni and D. Narducci, Nanoscale (2019) [2] ‘Scaling behavior of the thermal conductivity of width-modulated nanowires and nanofilms for heat transfer control at the nanoscale’, X. Zianni, V. Jean, K. Termentzidis and D. Lacroix, Nanotechnology 25, 465402 (2014) [3] ‘Diameter-modulated nanowires as candidates for high thermoelectric energy conversion efficiency’, X.Zianni, Applied Physics Letters 97, 233106 (2010) [4] ‘Coulomb oscillations in the electron thermal conductance of a dot in the linear regime’, X. Zianni, Physical Review B 75, 045344 (2007) [5] ‘Large thermoelectric power factor enhancement realized in InAs nanowires’, P.M. Wu, J. Gooth, X.Zianni, S. Fahlvik Svensson, K.D. Thelander, C. Thelander, K.Nielsch, H. Linke NanoLetters 13, 4080 (2013)

B.VIII.4
15:15
Authors : C. L. Manganelli1, D. Spirito1, M. Virgilio2, M. Montanari3, S. Faralli4, N. Andriolli4, W. M. Klesse1, and G. Capellini1,3
Affiliations : 1IHP ? Leibniz-Institut für innovative Mikroelektronik, Im Technologiepark 25, D-15236 Frankfurt (Oder), Germany 2 Dipartimento di Fisica, Università di Pisa, Pisa, 56127, Italy 3 Dipartimento di Scienze, Università degli Studi Roma Tre, Roma, 00146, Italy 4 Istituto TeCIP, Scuola Superiore Sant?Anna, Pisa, 5617, Italy

Resume : Elastic strain is routinely used to improve transport and optical performances of SiGe based devices because of the influence of lattice deformation on the electronic band-structure. Nevertheless, the mismatch between the Si and Ge lattice expansion coefficients originates a temperature- dependent contribution to the strain field with a relevant impact on the electronic spectrum. In this talk, we report a comprehensive analysis of thermo-mechanical properties of strained Ge microstructures with different geometries and different strain configurations. We discuss their impact on the photoemission properties, disentangling the contributions of mechanical deformations induced by stressor layers from the effects of the thermal components of the strain field. We first compare strain maps obtained with µ-Raman experiments at different temperatures with theoretical predictions based on FEM mechanical simulations combined with a perturbative approach, assessing the influence of strain and local heating on the Raman shift. Subsequently, we probe the effect of the strain field on the valence and conduction band edges by means of spatially resolved µ-PL experiments, interpreted in the framework of a theoretical model based on the deformation potential approach. With this comprehensive approach we show the potential benefits of strained structures as building blocks of opto-electronic applications offering guidelines for their design, optimization and integration in Si platforms.

B.VIII.5
15:30 Coffee break    
 
Session IX: Advanced characterization techniques : TBD
16:00
Authors : J. Slotte, A. Khanam, A. Vohra, I. Makkonen, R. Loo, G. Pourtois, C. Porret, W. Vandervorst
Affiliations : Department of Applied Physics, Aalto University, P.O. Box 15100, FI-00076 Aalto, Finland; Department of Applied Physics, Aalto University, P.O. Box 15100, FI-00076 Aalto, Finland; Imec vzw, Kapeldreef 75, 3001 Leuven, Belgium, K.U. Leuven, Department of Physics, Celestijenlaan 200D, 3001 Leuven, Belgium; Department of Applied Physics, Aalto University, P.O. Box 15100, FI-00076 Aalto, Finland; Imec vzw, Kapeldreef 75, 3001 Leuven, Belgium; Imec vzw, Kapeldreef 75, 3001 Leuven, Belgium, Department of Chemistry, Plasmant Research Group, University of Antwerp, B-2610, Wilrijk-Antwerp, Belgium; Imec vzw, Kapeldreef 75, 3001 Leuven, Belgium; Imec vzw, Kapeldreef 75, 3001 Leuven, Belgium, K.U. Leuven, Department of Physics, Celestijenlaan 200D, 3001 Leuven, Belgium;

Resume : Increasing the carrier concentration in epitaxial Ge and GeSn above 1e19/cm^3 poses a challenge from a defect point of view, as compensating defects are abundantly created in the growth of the layer. As the intent is to further increase the carrier concentration above 1e20/cm^3 and semiconductor doping starts to resemble more alloying than traditional doping, we are entering unfamiliar territory when it comes to defect dynamics. We have used positron annihilation spectroscopy (PAS) in combination with density functional theory (DFT) calculations to study compensating vacancy-donor complexes in epitaxial layers of Ge and GeSn doped with P and As. As expected the dopants form complexes with the native vacancy defects. In previous studies both mono- and divacancy complexes have been observed in highly doped Ge. Whereas monovacancy complexes dominated in diffusion doped bulk Ge, divacancy complexes were observed in implanted and laser annealed Ge. From the experimental results it is clear that monovacancies dominate the positron annihilation in all studied epitaxial layers. DFT calculations indicate that Sn does not have the desired effect of trapping vacancies, as the binding energies for V-Sn pairs is clearly lower than for complexes involving dopants. However, both experimental and computational PAS results indicate that Sn is having an impact on the annihilation state of the positrons.

B.IX.1
16:30
Authors : S. Prucnal1, M. O. Liedke2, X. Wang1, M. Posselt1, J. Knoch3, Y. Berencén1, L. Rebohle1, E. Napolitani4, J. Frigerio5, A. Ballabio5, G. Isella5,R. Hübner1, A. Wagner2, J. Zuk6, M. Turek6, M. Helm1, and S. Zhou1
Affiliations : 1Helmholtz-Zentrum Dresden-Rossendorf, Institute of Ion Beam Physics and Materials Research, Bautzner Landstraße 400, D-01328 Dresden, Germany; 2Helmholtz-Zentrum Dresden-Rossendorf, Institute of Radiation Physics, Bautzner Landstrasse 400, D-01328 Dresden, Germany; 3Institut für Halbleitertechnik, RWTH Aachen, Germany; 4Dipartimento di Fisica e Astronomia, Università di Padova and CNR-IMM MATIS, Via Marzolo 8, I-35131 Padova, Italy; 5 L-NESS, Dipartimento di Fisica, Politecnico di Milano, Polo di Como, Via Anzani 42, I-22100 Como, Italy; 6 Maria Curie-Skłodowska University, Institute of Physics, Pl. M. Curie-Skłodowskiej 1, 20-035 Lublin, Poland;

Resume : The n-type doping of Ge and Ge-based alloys is a self-limiting process due to the formation of vacancy-donor complexes (DnV with n ≤ 4) that deactivate the donors. This work clearly demonstrates that the dissolution of the DnV clusters in a heavily n-doped Ge, GeSn and SiGeSn layers can be achieved by millisecond-flash lamp annealing. This DnV cluster dissolution results in a considerable increase of the electrical activation together with a suppression of donor diffusion. Using electrical measurements and positron annihilation lifetime spectroscopy, combined with theoretical calculations, it is possible to address, understand and solve the fundamental problem of achieving ultra-high doping level in Ge, that has hindered so far the full integration of Ge and Ge-based alloys with complementary-metal-oxide-semiconductor technology. This work is partially supported by the National Science Centre, Poland, under Grant No. 2016/23/B/ST7/03451.

B.IX.2
17:00
Authors : Nobuya Nakazaki, Erik Rosseel, Clement Porret, Andriy Hikavyy, Roger Loo, Naoto Horiguchi and Geoffrey Pourtois
Affiliations : Sony Semiconductor Solutions Corporation, imec

Resume : A highly-doped epitaxially-grown source/drain is a key element for the development of the next-generation of transistors such as FinFET and GAA, where a high active dopant concentration is required for the device optimization. This in turn requires a deep understanding of the defect formation mechanisms related to the dopant deactivation. This paper presents a density functional theory study of the dopant-defect complex formation in P and As co-doped Si layer (Si:P+As). Emphasis is placed on the impact of As co-doping on the defect formation in Si:P. Numerical results indicate that for both P and As, a stable deactivation vacancy (V) complex in Si is DxV (D = P or As, x = 1–4), where the V is surrounded by dopants. The formation enthalpy of AsxV is lower than that of PxV, implying that As traps V more efficiently than P. In turn, As co-doping is expected to help increasing the active P concentration by releasing them from the complex. In addition, our simulation results indicate that a stable interstitial dopant-based complex in Si is a split interstitial (S), where two deactivated dopants occupy one Si site. As is found to form more likely S in Si than P at high dopant concentration, implying that solubility of As in Si is lower than that of P. Our simulations suggest that at low concentration, As co-doping with Si:P enhances the P activation. This is in good agreement with our experimental observations, where a 1.2 % As+P concentration grown at 450°C leads to a higher active dopant concentration than for Si:P alone.

B.IX.3
17:15
Authors : R. Demoulin (1), M. Roussel (1), S. Duguay (1), P. Pareige (1), E. Talbot (1), D. Muller (2), D. Mathiot (2)
Affiliations : (1) Groupe de Physique des Matériaux (GPM), Normandie Univ, UNIROUEN, INSA Rouen, CNRS, 76000 Rouen, France ; (2) ICube Laboratory, Université de Strasbourg, CNRS, B.P. 20, 67037 Strasbourg cedex, France

Resume : Materials consisting of silicon nanocrystals (Si-ncs) embedded in SiO2 are the subject of an intense research activity due to their potential applications in optoelectronic. Providing charged carriers by introducing n- or p-type impurities in the core of Si-ncs can drastically modify their properties. A perfect control of the doping level should allow to tune the material properties for specific applications. In fact, it has been shown that highly P or B doped Si-ncs should exhibit strong plasmonics properties. However, due to the low solubility of impurities in silicon and side effects like self purification (i.e. impurities are expelled toward Si-ncs), reaching high doping level could be difficult. To understand and to improve the quality of these systems, an accurate control of the dopant location is necessary. In this work, n- (P, As) and p-type (B) doping carried out by co-implantation with Si in SiO2 thin films annealed at 1000°C have been investigated using Atom Probe Tomography. By computing 3D mapping of chemical species, we studied the structure of these films at the atomic scale to investigate the location of dopants and the Si clustering characteristics along the implantation profile. We highlighted an influence of the dopant nature on the Si-ncs growth and showed that high level of n-type impurities can be introduced in the core of every Si-ncs. Behavior of p-type doping will be discussed and seems different, with only low level doping observed in some Si-ncs.

B.IX.4
18:00 Graduate Student Awards Ceremony and Reception (Main Hall)    
Start atSubject View AllNum.Add
 
Session X: Photonics I : TBD
09:00
Authors : Jaroslaw Kirdoda 1, Lourdes Ferre Llin 1, Kateryna Kuzmenko 2, Peter Vines 2, Zoe Greener 2, Derek CS Dumas 1, Ross W. Millar 1, Muhammad M. Mirza 1, Gerald S Buller 2, and Douglas J. Paul 1
Affiliations : 1. University of Glasgow, School of Engineering, Rankine Building, Oakfield Avenue, Glasgow, G12 8LT, U.K. 2. Heriot-Watt University, Institute of Photonics and Quantum Sciences, School of Engineering and Physical Sciences, Edinburgh, EH14 4AS, U.K.

Resume : Many quantum optics, quantum communications and quantum information processing systems require single photon detectors. Superconducting devices have demonstrated the highest single photon detection performance but require cryogenic cooling. Below 1 µm wavelength, CMOS single photon avalanche detectors (SPADs) provide 300 K operation. For short wave infrared wavelengths as required for telecoms or superior imaging through atmospheric obscurants, InGaAs SPADs are commercially available and operate on Peltier coolers. Here we present Ge on Si SPADs operating with 38% single photon detection efficiency at 1310 nm and 125 K. Results will be presented from devices ranging from 100 µm diameter to 25 µm diameter with the smallest devices demonstrating jitter of 150 ps with dark count rates of 2830 Hz for 2.48% excess bias and NEP of 4 x 10^-17 W/√Hz at 125 K. The devices demonstrate Geiger mode operation up to 200 K and afterpulsing levels are at least five times lower than InGaAs devices under nominally identical conditions. The wavelength dependence will be presented with the direct band edge at 150 K being about 1500 nm above which the SPAD performance decreases significantly. Approaches to increase the performance to 1550 nm will be discussed. A review of single photon applications will be discussed. Initial lidar results will be presented demonstrating the ability to range over km distances and hundreds of metres through obscurants at eye safe powers at 1450 nm wavelength.

B.X.1
09:30
Authors : Frederic Gardes, Katarzyna Grabska, Lorenzo Mastronardi, Mehdi Banakar, Thalia Dominguez Bucio, Milos Nedeljkovic, Callum Littlejohns, Andrea Ballabio, Andrea Barzaghi, Giovanni Isella
Affiliations : Optoelectronics Research Centre, University of Southampton, University Rd, Southampton SO17 1BJ, UK LNESS - Dipartimento di Fisica, Politecnico di Milano via Anzani, 22100 Como Italy

Resume : Silicon-germanium is a material of interest for silicon photonics research and industry related activities where high-performance modulator and detector devices working in the C band are required. For optimal operation of electro absorption modulators such as Franz- Keldysh effect a high-quality material coupled to a precise composition of the material is of outmost importance. We report for the first time a GeSi heterostructure EAM modulator demonstrating performance up to 56Gb/s and a Rapid Melt Growth (RMG) deposition method of SiGe forming crystalline structures embedded in an SOI platform. The RMG based SiGe composition is uniform over the length of the SiGe wires and demonstrate tunability of the composition of SiGe using a single deposition process. This method is suitable for waveguide integration on the SOI platform which is crucial for multi wavelength operation of Franz Keldysh type modulators.

B.X.2
09:45
Authors : Andrea Barzaghi (1), Saleh Firoozabadi (2), Marco Salvalaglio (3), Roberto Bergamaschini (4), Fabio Signorelli (5), Andrea Ballabio (1), Andreas Beyer (2), Marco Albani (4), Axel Voigt (3), Francesco Montalenti (4), Kerstin Volz (2), Alberto Tosi (5), Giovanni Isella (1)
Affiliations : (1) L-NESS, Dipartimento di Fisica, Politecnico di Milano, P.zza Leonardo da Vinci, 32 20133 Milano, Italy (2) Materials Science Center and Faculty of Physics, Philipps-Universität Marburg, Hans-Meerweinstrae 6, 35032 Marburg, Germany (3) Institute of Scientific Computing, Technische Universität Dresden, Willersbau, B 209 - Zellescher Weg 12-14, 01062 Dresden, Germany (4) L-NESS, Department of Materials Science, Università di Milano- Bicocca, via Cozzi 53, I-20126 Milano, Italy. (5) Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Via Ponzio 34/5, 20133 Milano, Italy

Resume : The epitaxial growth of germanium on silicon is a basic requirement in many fields, such as electronics and photonics. However, the mismatch in lattice parameter and thermal expansion coefficients results in defective epitaxial layers and reduced device performance. A novel approach, named vertical heteroepitaxy (VHE), has been recently demonstrated to address these issues. VHE employs deep patterning of Si wafers to obtain the vertical growth of a self-assembled array of Ge micro-crystals by Low-Energy Plasma-Enhanced CVD (LEPECVD). Such crystals have been demonstrated to be fully relaxed and have a high crystalline quality, while featuring the complete expulsion of threading dislocations. We aim to exploit VHE to grow an array of microSPADs (i.e. single photon avalanche diodes) operating in the visible to NIR range by depositing Ge on top of Si micro-crystals, featuring a carefully designed doping profile required by SPAD operation. SPADs are very sensitive to material quality, requiring optimal deposition conditions. Here we show the morphological (e.g. crystal faceting) characterization of Si micro-crystals by means of SEM imaging and FIB/SEM tomography as a function of deposition parameters and substrate patterning, and the conditions we selected for device growth. We then briefly show the deposition process of doped Si micro-crystals and some preliminary characterization of the doping profile, in the form of I-V curves from single micro-crystals and SIMS measurements.

B.X.3
10:00
Authors : L. Spindlberger 1, F. Murphy-Armando 2, J. Aberl 1, and Moritz Brehm 1
Affiliations : 1 Institute of Semiconductor and Solid State Physics, Johannes Kepler University Linz, Altenberger Strasse 69, 4040 Linz, Austria 2 Tyndall National Institute, Lee Maltings, Dyke Parade, Cork T12 R5CP, Ireland

Resume : Defect-enhanced quantum dots are all-group-IV room-temperature light-sources consisting of epitaxial Ge/Si quantum dots (QDs) and extended point defects that are intentionally introduced upon low energy ion implantation. Both carrier types, electrons and holes, are confined within the QD region, i.e. holes experience quantum confinement due to the large band offsets between Si and Ge, while electrons are trapped by introduced defects of split-[110] self-interstitial structure. The most prominent features of DEQDs are clear signs for optically-pumped lasing, absence of thermal quenching of the photoluminescence emission up to room-temperature, and the demonstration of LEDs, grown directly on Si working efficiently up to 100°C. Here, we present in a combined experimental and theoretical approach that the ~3.5% biaxially compressively strained Ge on Si “hut-cluster” QDs used up to now seem to be all but ideal host matrices for the light-emitting defects in DEQDs. Theoretical calculations based on density functional theory suggest that reducing the amount of compressive strain in the QD leads to a strong enhancement of the oscillator strength of the radiative transitions in this interlaced defect-QD system. Experimental evidence for improved photoluminescence emission for less-strained DEQD-systems as well as means to arbitrarily strain the DEQDs using thin DEQD membranes on piezoelectric actuators will be presented. These findings can be the key to tap the full potential of DEQD light-sources for applications in the field of Si photonics and beyond.

B.X.4
10:15
Authors : Ugne Griskeviciute 1, Kevin Gallacher 1, Ross W. Millar 1, Leonetta Baldassarre 2, Marc Sorel 1, Michele Ortolani 2, and Douglas J. Paul 1
Affiliations : 1 University of Glasgow, School of Engineering, Rankine Building, Oakfield Avenue, Glasgow, G12 8LT, U.K. 2 Dipartimento di Fisica, Universita di Roma La Sapienza, Piazzale Aldo Moro 5, I-00185 Roma, Italy.

Resume : Ge epitaxially grown on Si is an ideal material for an integrated photonics platform with low absorption between 1.8 µm and 14.5 µm wavelengths. Label free sensing is typically undertaken using Fourier Transform InfraRed (FTIR) spectrometers within the fingerprint region (6.7 to 20 µm) providing many absorption lines specific to individual molecules including explosives, bioweapons, bio-markers for point of care medical diagnosis and environmental pollutants. We present Ge on Si waveguides with waveguide losses measured between 7.5 to 11 µm wavelength and demonstrate losses as low as 1 dB/cm at 10 µm. Analysis will be presented which identifies the higher loss mechanisms at lower wavelengths and how these may be reduced to 1 dB/cm or less. The Ge waveguides are used to demonstrate evanescent molecular absorption spectroscopy between 7.5 to 11 µm wavelength and the results are compared to FTIR spectroscopy. Poly(methyl methacrylate) (PMMA) and acetone are measured with the Ge waveguides demonstrating significantly longer absorption lengths potentially allowing a significant increase in sensitivity despite low overlap of the optical mode with the analyte. A route to single chip spectroscopy systems using the Ge on Si mid-infrared photonics platform will be presented detailing the key source, sensor and detector criteria required for parts per million or better detection sensitivity suitable for a wide range of security, healthcare and environmental sensing applications.

B.X.5
10:30 Coffee break    
 
Session XI: Photonics 2 : TBD
11:00
Authors : T. Baron1, ML. Touraton1,2,3, T. Cerba1, M. Martin1, J. Moeyaert1, S. David1, V. Loup3, F. Bassani1, B. Salem1, D. Dutartre2, Mingchu Tang4, Siming Chen4, Huiyun Liu4, C. Jany3
Affiliations : 1. Univ. Grenoble Alpes, CNRS, CEA/Leti Minatec, LTM, F-38054 Grenoble Cedex 2 STMicroelectronics, 850 rue Jean Monnet, F-38926 Crolles Cedex, France 3 Univ. Grenoble Alpes, CEA, LETI, 38000 Grenoble, France 4 University College London, Torrington Place, London, WC1E 7JE, United Kingdom

Resume : III-V semiconductors present interesting properties and are already used in electronics, lightening and photonic devices. More particularly alloys containing Ga, In and Sb are increasingly used by the semiconductors industry for high frequency operation, WIFI technology, high power devices, lasers for communications, sensors… This sector accounts for about 90% of world consumption of gallium for example. With the huge increase of IoT devices there is a real challenge to be able to minimize the consumption of these elements or substitute them by more abundant ones to fulfill the same function. Among the envisaged solutions, replacing the III-V substrate by a silicon one and using selective hetero-epitaxy processes are very promising. In this contribution, we will review the different technologies compatible with large-scale integration to integrate III-V semiconductors to realize specific functions such as light emission and detection. An important aspect of the presentation will be devoted to MOCVD hetero-epitaxy of As and Sb based III-V compounds on large scale wafers. We will show that bulk material (InP, GaAs and GaSb substrates) could be substituted by thin layers elaborated on a standard Si(100) microelectronic substrates. Selective deposition will also be considered to put the materials only at the place where it is needed. The potentiality of these two approaches for photonic devices realization and more precisely lasers sources will be shown. As prospective solution, 2D materials monochalcogenides elaborated on large scale 300 mm Si substrates will be presented and their physical properties will be exposed. This work was supported by the French government managed by ANR , IRT Nanoelec ANR-10-IRT-05, ANR-15-IDEX-02 and LabEx Minos ANR-10-LABX-55-01

B.XI.1
11:30
Authors : F. Bassani1, T. Haffner1, E. Martinez2, P. Gentile3, E. Robin4, Y. Guerfi1, E. Eustache1, S. David1, J. Aubin2, J.M. Hartmann2, T. Baron1, B. Salem1
Affiliations : 1 Univ. Grenoble Alpes, CNRS, LTM, 38054 Grenoble Cedex 9, France 2 Univ. Grenoble Alpes, CEA, LETI, 38000 Grenoble, France 3 Univ. Grenoble Alpes, CEA, INAC-PHELIQS, 38000 Grenoble, France 4 Univ. Grenoble Alpes, CEA, INAC-MEM, 38000 Grenoble, France

Resume : In recent years, germanium tin (GeSn) alloy has attracted growing attention for its potential integration into microelectronic and optoelectronic devices. Interestingly, GeSn belongs to group-IV semiconductor compounds, has a direct bandgap for Sn concentration greater than 8 at% with a low bandgap energy (< 0.66 eV at RT) and, moreover, has a very high hole mobility (> 1900 cm2/V.s). In this work, we report on the fabrication of GeSn nanowires (NWs) obtained by both « bottom-up » and « top-down » approaches. In the first approach, GeSn NWs were grown by chemical vapor deposition (CVD) using the vapor-liquid-solid mechanism with standard gaz precursors (GeH4, SnCl4). After optimizing growth conditions (temperature and SnCl4/GeH4 ratio) to get perfectly straight NWs, we mainly investigated the incorporation and spatial distribution of Sn in the NWs by Auger and EDX-STEM measurements. In the second approach, GeSn NWs were fabricated by dry etching of GeSn layers having different Sn concentration (from 6 to 15 at%) previously grown by CVD on virtual Ge buffer layers. Here, we pay attention to the surface roughness of vertical and horizontal NWs as a function of etching conditions. We will show that suspended horizontal NWs have been obtained paving the way towards the realization of GeSn Gate-All-Around NW MOSFETs.

B.XI.2
11:45
Authors : L. Di Gaspare 1, M. Montanari 1, C. Ciano 1, L. Persichetti 1, L. Bagolini 1, M. Virgilio 2, G. Capellini 1,3, M. Zoellner 3, O. Skibitzki 3, D. Stark 4, G. Scalari 4, J. Faist 4, D. J. Paul 5, T. Grange 6, S. Birner 6, O. Moutanabbir 7, S. Mukherjee 7, L. Baldassarre 8, M. Ortolani 8, and M. De Seta 1
Affiliations : (1) Università Roma Tre,Dipartimento di Scienze Rome, 00146 Italy; (2) Università di Pisa, Dipartimento di Fisica, Pisa 56127, Italy; (3) IHP-Leibniz-Institut für innovative Mikroelektronik, Frankfurt (Oder), 15236 Germany; (4) Institute of Quantum Electronics ETH Zurich, Zurich, 8093 Switzerland; (5) School of Engineering, University of Glasgow, Glasgow, G12 8LT United Kingdom; (6) nextnano GmbH, Garching b. München, 85784 Germany; (7) Department of Engineering Physics, École Polytechnique de Montréal, Canada; (8)Università Sapienza, Rome, 00185 Italy.

Resume : THz quantum cascade lasers (QCLs) have been demonstrated in III-V materials, however being polar systems the QCL maximum operating temperature is limited by the electron-phonon interaction. From this prospective and for possible integration into CMOS processes, implementing the THz QCL architecture on non-polar SiGe system has a great technological relevance. Theoretical calculations showed that n-type Ge-rich heterostructures are the most promising. Here we study intersubband optical transitions and structural properties of n-type Ge/SiGe asymmetric coupled multi quantum wells grown by UHV chemical vapor deposition. Scanning transmission electron microscopy, atom probe tomography and X-ray diffraction measurements demonstrate the high material and interface quality and a very good composition and thicknesse¬¬s reproducibility. Fourier-transform infrared absorption spectroscopy measurements show intersubband (ISB) transitions among the confined states of the wells and indicate a high degree of control on inter-well coupling and electron tunneling [1]. These results combined with a modelling of the non-radiative lifetimes measured by pump-probe experiments allowed us to evaluate the system key parameters driving electron scattering. A theoretical description based on the non-equilibrium Green’s function formalism [2] was employed to assess the impact on gain of the interdiffusion length and interface roughness. Leveraging on the particularly low values of these parameters measured in our samples, the analisys suggests that laser operation can be achieved in optimized structures up to room temperature. 1. C. Ciano et al., Phys. Rev. Appl. 11, 014003 (2019) 2. T. Grange et al., Appl. Phys. Lett. 114, 111102 (2019)

B.XI.3
12:00
Authors : Jacopo Frigerio, Andrea Ballabio, Chiara Ciano, Andrea Mancini, Leonetta Baldassarre, Jonas Allerbeck, Joel Kuttruff, Giovanni Isella, Daniele Brida, Michele Virgilio, Michele Ortolani
Affiliations : L-NESS, Dipartimento di Fisica, Politecnico di Milano, Polo Territoriale di Como, Via Anzani 42, I-22100, Como, Italy; Dipartimento di Fisica, Sapienza Università di Roma, Piazzale Aldo Moro 5, I-00185 Rome, Italy; Department of Physics and Center for Applied Photonics, University of Konstanz, D-78457 Konstanz, Germany; Faculté des Sciences, de la Technologie et de la Communication, Université de Luxembourg, L-1511 Luxembourg; Dipartimento di Fisica ”E. Fermi”, Università di Pisa, Largo Pontecorvo 3, I-56127 Pisa, Italy

Resume : Mid-infrared (MIR) photonics is receiving considerable attention due to the variety of envisaged applications in medical diagnostics, biochemistry studies, chemical analytics, and environmental monitoring for safety and security. Nowadays, commercially available MIR spectroscopic systems are based on bulky and expensive instruments and, as a consequence, there is an increasing demand for compact sensing solutions that can be used in remote areas. In this framework, group IV photonics is emerging as a promising option to realize portable MIR spectroscopic systems. The main rationales behind the use of group IV materials are the cost-effectiveness and the reliable manufacturing technology already developed for microelectronic industry and the wide transparency of Si and Ge in the MIR spectral range. Since broadband MIR light sources integrated on silicon are still not available, wavelength conversion through non-linear optical effects is strongly demanded. In this work we present the theoretical investigation and the experimental verification of second harmonic generation in hole-doped Ge/SiGe asymmetric quantum wells (QW). We have developed a model for the valence band structure of SiGe alloys to find the optimal QW design for second-harmonic generation. The designed heterostructure has been grown by low-energy plasma enhanced chemical vapor deposition and second-harmonic generation has been observed by both continuous wave pumping with a quantum cascade laser emitting at a wavelength of 10.4 microns, and pulsed pumping with an optical parametric amplificator tunable between 9 and 11 microns.

B.XI.4
12:15
Authors : D.V. Yurasov, N.A. Baidakova, M.N. Drozdov, M.A. Kalinnikov, A.V. Nezhdanov, D.V. Shengurov, P.A. Yunin and A.V. Novikov
Affiliations : Institute for Physics of Microstructures, Russian Academy of Sciences, Nizhny Novgorod, Russia; Lobachevsky State University of Nizhny Novgorod, Nizhny Novgorod, Russia

Resume : Germanium is the very attractive material for development of Si-compatible light source due to its compatibility with CMOS technology and small difference (136 meV) between the direct and indirect gaps, which can be reduced by application of tensile strain or n-doping. Combination of such two methods could provide mutual benefits and increase the direct-gap luminescence efficiency. In this work the influence of Sb doping on optical properties of n-Ge layers grown by MBE on Si(001) and Ge(001) substrates are discussed. The use of different substrates made it possible to reveal the impact of various defects on n-Ge layer luminescence. It was obtained that interplay between the positive impact of doping due to states filling in L valley and the negative one due to additional absorption losses and carrier lifetime shortening requires accurate selection of appropriate doping level. It was also shown that rapid thermal anneal could influence the Ge luminescence efficiency significantly and its impact depend on doping level [Semicond. Sci. Technol. 33, 124019 (2018)]. n-Ge/Si layers with optimal doping level were used for fabrication of locally tensile strained microstructures [Semiconductors 52, 1442 (2018)], including structures with improved heat sink. The latter circumstance made it possible to expand the range of used optical pumping power by more than order of magnitude. Usage of various microresonators compatible with locally strained Ge microstructures is discussed.

B.XI.5
12:30 Lunch break    
 
Session XII: virtual substrates : TBD
14:00
Authors : Abderraouf Boucherif
Affiliations : Laboratoire Nanotechnologies Nanosystèmes (LN2) - CNRS UMI-3463, Institut Interdisciplinaire d’Innovation Technologique (3IT), Université de Sherbrooke, 3000 Boulevard Université, Sherbrooke, J1K OA5 Québec, Canada.

Resume : Abstract—Due to their high efficiency, III-V photovoltaic devices are very promising for terrestrial concentrator and space photovoltaics. Wide spread adoption of this technology would require significant improvement in efficiency and major cost reduction, in this talk I will review strategies and recent advances towards achieving these goals by using nanoporous semiconductors, nanocomposites and graphene based virtual substrates. Keywords— Virtual substrate, heteroepitaxy, mesoporous silicon, graphene, nanocomposites, photovoltaics Most optoelectronic devices such as lasers, photodetectors, and solar cells are made by the epitaxial growth of semiconductor heterostructures on monocrystalline wafers. Defect-free epilayers are a primary requirement to achieve a high-performance device. Today, the performance, the functionality, and the cost of those devices are restricted by the very few number of available monocrystalline wafers. In this talk, I will discuss different strategies to access cost-effective virtual substrates for germanium, III-V, IV-IV and III-N materials epitaxy. Among them, we have recently introduced a graphene-porous silicon nanocomposite compliant substrate. The idea behind this concept is to use a stretchable and flexible substrate such as porous silicon during the growth of lattice mismatch epilayers. Conceptually this allows the epilayer to elastically relax and transfer most of the strain to the flexible substrate. As a result, we would expect a reduction in misfit and threading dislocations formation during epitaxy. The process for making the substrate is very simple and scalable. To prove the concept, we have used a combination of Raman spectroscopy, X-ray diffraction reciprocal space mapping, scanning electron microscopy and transmission electron microscopy to study the strain and morphology evolution of the substrate after graphene deposition. We found that due to the unique flexibility of porous silicon the substrate allows to exceed critical thickness for plastic relaxation by 2 orders of magnitude. Additionally, thanks to the extreme temperature stability of the graphene coating, the substrate withstands temperatures up to 1050°C which makes it compatible with epitaxy of most technologically important semiconductor materials. Another new paradigm to reduce dislocation propagation by using nanoscale effects in plastically relaxed layers will be also reviewed, it is based on the use of nanovoids as dislocation barriers which block dislocations propagation. The interaction between dislocations and voids results in a significant reduction in TDD, making it a promising approach for the integration of optoelectronic devices on silicon. References: A. R. Boucherif, A. Boucherif, G. Kolhatkar, A. Ruediger, R. Arès, “Graphene–mesoporous Si Nanocomposite as a Compliant Substrate for Heteroepitaxy”, Small, 1603269 (2017). Y. A. Bioud, A Boucherif, M. Myronov, A. Soltani, G. Patriarche, N. Braidy, D. Drouin and R. Arès, “Highly scalable defect-free heteroepitaxy using nanovoids as dislocations barrier” Nature communications, (2019) revision

B.XII.1
14:30
Authors : M. Mastari, M. Charles, P. Pimenta-Barros, M. Argoud, R. Tiron, A.M. Papon, N. Chevalier, D. Landru, Y. Kim, O. Kononchuck and J.M. Hartmann
Affiliations : M. Mastari, M. Charles, P. Pimenta-Barros, M. Argoud, R. Tiron, A.M. Papon, N. Chevalier, and J.M. Hartmann : Univ. Grenoble Alpes, CEA, LETI, 38000 Grenoble, France D. Landru, Y. Kim, O. Kononchuck : SOITEC, Parc Technologique des Fontaines F-38190 Bernin, France

Resume : The epitaxy of Ge on Si is far from being lattice matched (4.2% difference between Si and Ge), making the growth of thick layers challenging. Several schemes have been explored in the literature to obtain Ge layers, such as a Low Temperature / High Temperature (LT / HT) approach followed by a cyclic anneal. Another interesting approach is to perform the heteroepitaxy of Ge in nanometer-size Si windows surrounded by SiO2. Some groups have succeeded in obtaining high quality Ge layers using nano-heteroepitaxy, but there was no analysis of defects generated with that approach. In this contribution, Ge epitaxy on nanometer-size Ge pillars was studied in a 300 mm industrial Reduced Pressure-Chemical Vapor Deposition tool. A patterning scheme based on diblock copolymer lithography was used to fabricate honeycombed nanometer-sized Si templates. The epitaxial growth of Ge nano-pillars at 600°C (with GeH4) was highly selective and uniform. Various thickness Ge layers grown with a LT/HT approach on Ge nano-pillars were characterized by Atomic Force Microscopy, X-Ray Diffraction and cross-sectional Transmission Electron Microscopy. The surface morphology of 2D Ge layers grown on Ge nano-pillars was degraded compared to that of layers grown on blanket, bulk Si. The other structural properties (the slight tensile strain, threading dislocations densities from XRD and so on) were quite similar, however. Stacking faults and twins otherwise appeared during the coalescence process.

B.XII.2
14:45
Authors : M. Albani 1, R. Bergamaschini 1, M. Salvalaglio 2, A. Voigt 2, L. Miglio 1, F. Montalenti 1
Affiliations : 1 L-NESS and Dept. of Materials Science, University of Milano-Bicocca, Milano 20125, Italy 2 Institute of Scientific Computing Technische Universität Dresden, Dresden 01062, Germany

Resume : In the quest for novel high performance devices, innovative architectures need to be developed by exploiting three dimensional heterostructures. This requires a fine control of the morphology and faceting of the crystal surface, particularly for self-assembled growth processes. Vertical structures can be obtained in out-of-equilibrium growth conditions, where the kinetics of adatom incorporation on the surface overrules the material redistribution driven by surface energy minimization. Here we present a comprehensive phase-field model [1] to predict the realistic growth pathway of semiconductor crystals in three dimensions. Simulation results focus first on the growth of Si and Ge microcrystals on Si pillars by reproducing the evolution of the faceted morphology, comparing different growth temperatures, deposition flux distributions and pattern orientations. Particular attention will be devoted to the faceting at the crystal top, composed mainly by {100}, {110} and {113}, which is more critical for optoelectronic performances. Then, GaAs nanomembranes obtained by selective area epitaxy [2] are investigated. The vertical growth is promoted by a large difference in the adatom incorporation time for {110} and {111}B surfaces, quantified by the model to be of one order of magnitude. Simulations capture also the more complex faceting found in experiments when rotating the pattern orientation. [1]Albani, Phys Status Solidi b, 1800518 (2019) [2]Albani, Phys Rev Materials 2, 093404 (2018)

B.XII.3
15:00 Closing speech    
15:10 End of E-MRS fall 19 symposium B.    

Symposium organizers
Clement PORRETIMEC

Kapeldreef 75, 3001 Leuven, Belgium

Clement.Porret@imec.be
Didier LANDRUSOITEC

Parc Technologique des Fontaines, Chemin des Franques, 38190 Bernin, France

didier.landru@soitec.com
Giovanni ISELLAPolitecnico di Milano

LNESS Dipratimento di Fisica, via Anzani 42, 22100 Como, Italy

giovanni.isella@polimi.it
Inga Anita FISCHERBrandenburg Technical University

Erich-Weinert-Str. 1, 03046 Cottbus, Germany

inga.fischer@b-tu.de