preview all symposia

MATERIALS, ELECTRONICS AND PHOTONICS

X

Silicon carbide and related materials for energy saving applications

Electronic materials for energy saving are of particular interest to meet the accelerating demand of the worldwide energy consumption. Engineering of the wide band-gap semiconductor silicon carbide plays a key role because it provides excellent physical properties that go beyond the semiconductor silicon.

Scope:

The symposium has the aim to touch four important topics in the field of the application of SiC in energy saving:

(i) Bulk and epitaxial materials growth and defects: Crystal growth and epitaxy of SiC need elevated temperatures that push the processing apparatus and processing conditions to the limit of current technology. In this context, control of defect density is a key challenge. 

(ii) Processing of SiC electronic devices: SiC device technology offers a number of similarities to the standard semiconductor silicon and, to a certain extent, even allows device fabrication in a shared lab environment. Nevertheless, a number of device building blocks like the metal oxide semiconductor interface or Ohmic contacts still need to be significantly improved in the case of SiC.

(iii) Energy saving systems based on SiC: The real benefit of the wide bandgap SiC for energy applications needs to be demonstrated at a system level, where SiC based device components, in particular, show their advantage in terms of application benefit and reliability over its silicon counterpart.

(iv) Related materials and novel applications: Beside power electronics, SiC exhibits a number of superior applications for energy saving in the electro-optical application field. In addition, SiC may be combined with and could benefit from other novel (semi-)conductor materials like GaN, b-Ga2O3 and graphene.

Hot topics to be covered by the symposium:

  • Bulk growth and epitaxy of SiC
  • Defect characterization and defect engineering in SiC
  • processing
  • device fabrication (diodes, MOSFETs, bipolar switches and others)
  • power electronic systems (e.g. AC-DC, DC-DC converters and others for e-drive, photovoltaics and wind energy)
  • Interfaces of SiC to GaN and Graphene, novel electro-optical applications

List of invited speakers:

  • Noboru Ohtani (KWANSEI, Japan), Review on bulk growth of SiC
    Michael Dudley (Stony Brook University, USA), Defect evaluation in bulk SiC
  • Phillippe Gordignon (CNM, Spain), Devices and processing of SiC devices
  • Haiyan Ou (DTU, Denmark), Novel optical applications - SiC LEDs and waveguides
  • Fabrizio Roccaforte (CNM, Italy), Related wide bandgap materials (GaN processing and devices)
  • Ekaterine Chikoidze (Univ. Paris-Saclay, France), Gallia: Surprising electronic properties

Publication:

Selected papers will be published in the journal "Materials" (MDPI).

Start atSubject View AllNum.Add
09:00 WELCOME ADDRESS to SYMPOSIUM X    
 
SiC Growth & Epitaxy : Francesco LA VIA
09:15
Authors : Noboru Ohtani
Affiliations : Kwansei Gakuin University, School of Science and Technology

Resume : In the last decade, significant progress in the quality improvement of silicon carbide (SiC) single crystals has made the fabrication of high performance SiC power devices a reality. 100 and 150 mm diameter 4H-SiC epitaxial wafers with a low dislocation density have already been brought to market, and using these wafers, high performance SiC power devices are fabricated. However, widespread commercialization of the devices is still hindered by technological issues related to SiC crystal growth, and thus it is abundantly clear that further successful development of SiC semiconductor technology relies on achieving an understanding of SiC crystal growth process and, based on it, improving the technology of manufacturing large high-quality SiC crystals. In this presentation, I will talk about a relevant issue in high-quality 4H-SiC crystals, i.e., the defect formation during physical vapor transport (PVT) growth, particularly focusing on the dislocation formation. X-ray topography and Raman microscopy were employed to investigate the dislocation formation at the initial stage of PVT growth and the nucleation and multiplication of basal plane dislocations during PVT growth. The latter is currently a topic of the most serious concern since it is deeply related to the reliability issues of SiC power devices. It was found that dislocations observed in PVT-grown 4H-SiC crystals exhibited several characteristic features in their types and distribution. Based on these results, I will discuss the formation mechanism of dislocations during PVT growth of 4H-SiC crystals.

X.X-Ia.1
09:45
Authors : Matthias Arzig, Michael Salamon, Norman Uhlmann, Peter J. Wellmann
Affiliations : Crystal Growth Lab Materials Department 6 (i-meet) University of Erlangen-Nürnberg (FAU) 91058 Erlangen Germany, Fraunhofer Institute for Integrated Circuits Development Center for X-Ray Technology (EZRT) 90768 Fürth Germany, Fraunhofer Institute for Integrated Circuits Development Center for X-Ray Technology (EZRT) 90768 Fürth Germany, Crystal Growth Lab Materials Department 6 (i-meet) University of Erlangen-Nürnberg (FAU) 91058 Erlangen Germany

Resume : During the PVT Growth of 4H-SiC, the mass distribution in the source material changes as it is consumed. From in-situ CT measurements we find that two areas of different mass and morphology are formed. With this work we want to show the influence of the changing powder on the growth kinetics of the SiC crystal. The SiC vapor species are sublimed in the hottest areas first, leaving behind a skeleton of porous graphite. Due to vapor transport and the resublimation in the colder parts of the source material, a morphological change of the SiC powder to a needle like structure takes place. The initially round powder particles are converted into columnar structures comprising cylindrical pores aligned in the direction of mass flow. Due to the alignment of the cylindrical pores the effective heat conductivity of the source material will change into a directional property. In this work we want to extract the morphological and geometrical changes we can find in the in-situ CT at different stages of crystal growth and take it into account for the modeling of the temperature field. In this way, the alteration of growth parameters caused by changes in the source material will be evaluated. In particular we are interested to which extend the growth interface of the growing crystal is affected by a changing temperature profile or by mass transport phenomena.

X.X-Ia.2
10:00
Authors : Johannes Steiner, Melissa Roder, Andreas Danilewsky,
Affiliations : Johannes Steiner, Crystal Growth Lab, Materials Department 6 (i-meet), FAU Erlangen-Nuremberg, Martensstr. 7, D-91058 Erlangen, Germany; Melissa Roder, Andreas Danilewsky, Kristallographie, Institut für Geowissenschaften, University Freiburg, D-79104, Germany;

Resume : During PVT-growth, thermal stresses caused by differing thermal expansion coefficients of the growth setup and the growing crystal occur, introducing defects in the crystal. These stresses can be reduced by varying the duration of the cooling phase of the growth run. For this paper, two 100 mm 4H-SiC crystals with long (80 h) and short (40 h) cooling steps were grown. Wafers near the seed and close to the growth interface of the crystals are cut and etched with molten KOH to look at the occurrence of basal plane dislocations (BPDs). Defect densities of BDPs are taken from the center and the edge of the wafers. Alignment of Defects in the <1-100> and <11-20> are also investigated. Since BPDs lie perpendicular to the growth direction, these defects are not caused by defects inherited from the seed and can be used as an indicator for thermomechanical stress emerging during the cooling phase. A simulation model is implemented describing the thermomechanical stresses in the crystal and the growth setup during the cooling step. The experimental results are compared using the simulation model with the main focus on the stress values found in the center and on the edge of the crystal. A correlation is demonstrated between simulated stress values and defect densities of BPDs and the influence of a longer cooling step on the crystal quality is shown. The findings can be used to improve the geometry of the growth setup and subsequently decrease thermal stress.

X.X-Ia.3
10:15 Coffee Break    
 
SiC Growth & Epitaxy : Noboru OHTANI
10:45
Authors : M. Zielinski 1), S. Monnoye 1), H. Mank 1), F. Torregrosa 2), G. Grosset 2), Y. Spiegel 2)
Affiliations : 1) NOVASiC, Savoie Technolac, BP267, F-73375 Le Bourget-du-Lac Cedex, France; 2) ION BEAM SERVICES, 13790 Peynier, France

Resume : We have recently demonstrated that the high temperature hydrogen annealing of thin Carbon coatings deposited/implanted on (100) Silicon substrate by Plasma Immersion Ion Implantation (PIII) technique resulted in formation of 3C-SiC film. The thickness of the 3C-SiC film could be controlled by adjusting the annealing temperature and/or duration. Furthermore, for C coatings obtained in deposition mode (negligible impact energy), the 3C-SiC film was oriented with respect to substrate and could be used successfully as seed for further 3C-SiC epitaxial growth. In the present contribution we will present the extension of this study to other Si orientations and we will also report on the role of thickness of initial Carbon coating. For this purpose, the 5nm, 10nm and 40nm thick Carbon coatings were deposited by PIII on the top of (100), (110), (111) and (112) oriented Si substrates. The wafers were diced and submitted to annealing in CVD reactor under H2 flow at temperatures ranging from 1250°C to 1400°C. The formation of 3C-SiC after thermal treatment was detected and quantified using Fourier-transform infra-red (FTIR) spectroscopy. Scanning electron microscopy (SEM) and optical microscopy (OM) were used to control the surface evolution and quantify the voids formation at 3C-SiC/Si interface. This work has been supported by the European project CHALLENGE (Call: H2020-NMBP-2016-2017, grant. agreement 720827).

X.Ib.1
11:00
Authors : F. La Via1, M. Zielinski2, F. Mancarella3, C. Calabretta1, C. Bongiorno1, M. Zimbone1
Affiliations : 1 CNR-IMM, Strada VIII 5, 95121, Catania, Italy 2 NOVASiC, Savoie Technolac, BP267, F-73375 Le Bourget-du-Lac Cedex, France 3 CNR-IMM, Via P. Gobetti 101, 40129, Bologna, Ital

Resume : 3C-SiC devices are hampered by the defect density in hetero-epitaxial films. Acting on the substrate, it is possible to achieve a better compliance between Si and 3C-SiC. We present here an approach to favorite defect geometrical reduction in both [ ] and [ ] directions by creating Inverted Pyramids on Si (IPS). A study of 3C-SiC growth on IPS is reported showing benefits in the film quality and a reduction in the linear density of stacking faults. The particularity of 3C-SiC growth process on ISP substrate is that film grows occurs simultaneously on (111) (inside the pyramids) surfaces and (100) surfaces (ridges between adjacent pyramids). The optimized carbonization step has to give satisfactory results on both surface orientations. From the experiment it has been observed that the carbonization generally used for (111) silicon substrate gives better results. Furthermore the growth process on (100) surface shows a larger growth rate with respect to the growth on the (111) surface and this effect produce some voids inside the material. The main problem of the process is that from the (100) ridges between the pyramids, several Anti Phase Boundary (APB) are originated and these defects generate also several stacking faults (SFs). To reduce these last defects both a reduction of the (100) ridges or the use of an off-axis substrate has been tested and the results will be presented at the conference.

X.Ib.2
11:15
Authors : P. Schuh, F. La Via, M. Mauceri, M. Zielinski, P. J. Wellmann
Affiliations : Crystal Growth Lab Materials Department 6 (i-meet) FAU Erlangen-Nuremberg Martensstr. 7 D-91058 Erlangen Germany, CNR-IMM, sezione die Catania Stradale Primosole 50 I-95121 Catania Italy, LPE S.P.A. Sedicicesima Strada I-95121 Catania Italy, NovaSiC rue Bernard Gregory 06560 Valbonne France, Crystal Growth Lab Materials Department 6 (i-meet) FAU Erlangen-Nuremberg Martensstr. 7 D-91058 Erlangen Germany

Resume : The cubic polytype of SiC shows technological challenges for the bulk-growth such as a high supersaturation, a silicon rich gas phase and a high vertical temperature gradient. We have developed a transfer method for high quality 3C-SiC-on-Si seeding layers (grown by CVD) on top of a SiC carrier, creating a seeding stack suitable for the use in sublimation epitaxy. The main challenge for this transfer is the creation of a large area free-standing 3C-SiC epi-layer. By optimizing the transfer using a ND:YvO4 laser with a wavelength of 1064nm for cutting and a suitable removal for the silicon (HF:HNO3:H2O) we increased the dimensions of our seeding area up to 52x52 mm2 yielding two inch seeds for the subsequent vapor phase growth. Growth on such seeding stacks was conducted showing a reproducible process for the manufacturing of 3C-SiC material up to two inch with thicknesses from 0.5mm up to 0.87mm. In additional experiments first attempts for four inch growth was conducted. The samples were characterized using optical microscopy, Raman and XRD. Occurring defects are protrusions, carbon inclusions and stacking faults. Even though the protrusion defect states a big problem with increasing thickness, bulk-like samples grown with this method show no stress in the XRD characteristics. Analysis of surface defects state a coherence between growth velocities of different surface orientations.

X.Ib.3
11:30
Authors : R. Anzalone#, M. Mauceri°, M. Zimbone§, E.G. Barbagiovanni§#, C. Calabretta§, A. Alberti§, F. La Via§
Affiliations : # STMicroelectronics, Stradale Primosole 50, 95121, Catania, Italy ° LPE, Strada XVI, 95121, Catania, Italy § CNR-IMM, Strada VIII 5, 95121, Catania, Italy

Resume : In order to growth 3C-SiC bulk material of 4 and 6 inches a new epitaxial reactor chamber has been designed and tested. The main idea is to grow a thick hetero-epitaxial layer on silicon, melt the silicon substrate and continue the growth at high temperature. In this way it will be possible to grow a bulk substrate of 3C-SiC with a low density of SFs and low wafer bow. In fact, the bow can be strongly decreased by removing silicon one of the main components of the stress due to the different thermal expansion coefficient between the two materials is completely eliminated. The removal of silicon gives also the possibility of a large increase in the growth temperature and in the growth rate, and then thicker wafers and better material can be grown. A large set of experiments have been performed to understand how to melt the silicon substrate, how to etch the residual silicon and how to grow the homo-epitaxial layer on the 3C-SiC substrate obtained after the silicon melting. In this work, we will describe the experiments on the melting and etching process and the experiments to optimize the homo-epitaxial growth at high temperature. We have observed that both the growth temperature and the growth rate have a great impact on the defects density (SFs, point defects, …) while the doping has a large effect on the internal stress of the material. The optimization and the complete characterization of the process in terms of defects density will be presented to the conference.

X.Ib.4
11:45
Authors : M. Portail1, S. Rennesson1, L. Nguyen1, E. Frayssinet1, A. Courville1, P. Vennéguès1, A. Michon1, F. Semond1, Y. Cordier1 and M. Zielinski2
Affiliations : 1) CNRS-CRHEA, 06560 Valbonne, France; 2) NOVASiC, 73375 Le Bourget du Lac, France

Resume : 3C-SiC is as a wide band semiconductor offering very attractive properties for power electron devices. But the difficulties for growing it either under bulk form or thin film make it an overlooked material compared to III-Nitrides or hexagonal SiC polytypes. 3C-SiC/Si heterostructures face the issue of a low crystalline quality, with no way, to date, for electrically isolating it from the Si substrate. The use of AlN/Si templates could be a very promising way to overcome both previous issues according to a very low lattice mismatch between AlN and SiC. Furthermore, the very high energy band gap of AlN (6.02eV) prevents, theoretically, any electrical leakage towards the Si substrate. In this presentation, we explore the specific trends of 3C-SiC growth on AlN/Si thin films. We also consider AlN grown on sapphire in order to assess AlN film with different strain state than AlN/Si templates. 3C-SiC growth has been achieved under CVD using silane (SiH4) and propane (C3H8) as precursors at temperatures between 1200 and 1350° under H2 and N2. Single crystalline 3C-SiC thin films have been obtained for both cases with characteristics according to the nature of the substrate. We show a gain in crystalline quality of the 3C-SiC grown on AlN/Si compared to a direct growth on Si. In particular, we focus on the structural evolution of the AlN/Si templates induced by the high temperature regrowth process. The evolution of electrical properties of the grown films has been studied also.

X.Ib.5
12:00 Lunch    
 
SiC Related Materials : Haiyan OU
13:15
Authors : E.Chikoidze1*, D. J. Rogers2, A.Perez-Tomas3, C.Sartel, F. H. Teherani2, H. abdelwahab1, T. Tchelidze4, C. Ton-That5, V.Sallet1, J.von Bardeleben6, M.Jennings7, Y .Dumont1
Affiliations : 1Université de Versailles- CNRS, Université Paris-Saclay, France 2Nanovation, France 3Catalan Institute of Nanoscience and Nanotechnology, Spain 4Tbilisi State University, Georgia 5University of Technology Sydney, Australia 6INSP, Siorbonne University, France 7Swansea University, UK

Resume : Recent breakthroughs in material quality have led to a “rediscovery” of Ga2O3 such as a high band gap transparent conductor, transparent field-effect transistors, photodetectors but also as a platform for power electronic devices.1-3 Our work is dedicated to Ga2O3 , in the most stable beta-phase. Physical properties of nominally undoped -Ga2O3 thin-films grown on c and r-sapphire substrates by pulsed laser deposition (PLD) and MOCVD will be discussed. An unexpectedly low resistivity of (×10-2cm) for n type Ga2O3/r-Al2O3 (by PLD) was found to be resistant to high dose proton irradiation and largely invariant (metallic) over temperatures from 2 to 850K. Energy dispersive X-ray fluorescence spectroscopy, secondary ion mass spectroscopy, Rutherford backscattering spectrometry, X-ray photoemission spectroscopy and electron paramagnetic resonance did not reveal the presence of significant shallow donor concentrations (defects or impurities). It was postulated, therefore, that the degenerate (confirmed by ultraviolet photoelectron spectroscopy) electrical transport could be the result of a two-dimensional like metallic surface.4 Attaining p-type doping in gallium oxide may already be an important step for technological integration.We showed the first time an evidence of high temperature p-type conduction in the undoped -Ga2O3 grown by PLD and MOCVD. Hole conduction, established by Hall and Seebeck measurements,is consistent with findings from photoemission and cathodoluminescence spectroscopies. The ionization energy of the acceptor level was estimated to be 1.2eV above the valence band edge.5 1. S.C. Dixon, et al , J. Mater. Chem. C, 2016, 4, 6946 2. J.A. Caraveo-Frescaset al ACS Nano, 7, 5160 (2013) 3. M. Higashiwaki, et al, Appl. Phys. Lett. 100, 013504 (2012) 4.E. Chikoidze et al, Materials Today Physics 8 10e17, (2019) 5. E. Chikoidze et al, Mater. Today Phys. 3, 118 (2017)

X.II.1
13:45
Authors : F. Roccaforte 1, G. Greco 1, P. Fiorenza 1, F. Iucolano 2
Affiliations : 1. CNR-IMM, Catania (Italy); 2. STMicroelectronics, Catania (Italy)

Resume : Today, the introduction of wide band gap semiconductors in power electronics has become mandatory to improve the energy efficiency of devices and modules and to reduce the overall electric power consumption. Due to its excellent properties, gallium nitride (GaN) and related alloys (e.g., AlxGa1-xN) are promising materials for the next generation of high-power and high-frequency devices [1]. However, there are still several technological concerns hindering the complete exploitation of these materials [2-4]. As an example, high electron mobility transistors (HEMTs) based on AlGaN/GaN heterostructures are inherently normally-on devices, while normally-off operation is required in many power electronics applications. This paper will give an overview on some scientific and technological aspects related to normally-off GaN HEMTs technology. In particular, a special focus will be put on the p-GaN gate [5-6] and on the recessed gate hybrid MISHEMT [7-9]. The role of the metal on the p-GaN gate and of the insulator in the recessed MISHEMT region will be discussed. Moreover, some novel approaches for normally-off GaN transistors will be also mentioned, giving also a short look to the status of vertical GaN devices. [1] F. Roccaforte, P. Fiorenza, R. Lo Nigro, F. Giannazzo, G. Greco, Riv. Nuovo Cimento 41 (2018) 625-681 (DOI: 10.1393/ncr/i2018-10154-x) [2] F. Roccaforte, P. Fiorenza , G. Greco, R. Lo Nigro, F. Giannazzo, A. Patti, M. Saggio, Physica Status Solidi a 211, (2014) 2063-2071. [3] F. Roccaforte, P. Fiorenza, G. Greco, M. Vivona, R. Lo Nigro, F. Giannazzo, A. Patti, M. Saggio, Appl. Surf. Sci. 301 (2014), 9-18. [4] F. Roccaforte, P. Fiorenza, G. Greco, R. Lo Nigro, F. Giannazzo, F. Iucolano, M. Saggio, Microelectronic Engineering 187-188, (2018) 66-77. [5] G. Greco, F. Iucolano, S. Di Franco, C. Bongiorno, A. Patti, F. Roccaforte, IEEE Transaction on Electron Devices 63, (2016) 2735-2741. [6] G. Greco, F. Iucolano, F. Roccaforte, Materials Science in Semiconductor Processing 78, (2018) 96-106. [7] P. Fiorenza, G. Greco, F. Iucolano, A. Patti, F. Roccaforte, IEEE Transaction on Electron Devices 64, (2017), 2893-2899. [8] G. Greco. P. Fiorenza, F. Iucolano, A. Severino, F. Giannazzo, F. Roccaforte, ACS Appl. Mater. Interfaces 9, (2017) 35383–35390. [9] P. Fiorenza, G. Greco, E. Schilirò, F. Iucolano, R. Lo Nigro, F. Roccaforte, Jpn. J. Appl. Phys. 57, 050307 (2018).

X.II.2
14:15
Authors : A. Kakanakova* (1), N. Suwannaharn (1), C.-W. Hsu (1), I. Shtepliuk (1), I.G. Ivanov (1), R. Yakimova (1), F. Giannazzo (2), I. Cora (3), and B. Pécz (3)
Affiliations : (1) Linköping University, Linköping, Sweden (1), (2) CNR-IMM, Catania, Italy, (3) MTA EK MFA, Budapest, Hungary

Resume : Research is currently in the focus to bring success in the MOCVD of group III nitrides on epitaxial graphene with applications in, e.g., flexible electronics. Mostly, the MOCVD of GaN on epitaxial graphene has been reported with emphasis on realizing the concept of van der Waals epitaxy of sp3-bonded 3D films on 2D materials. Here, we employ several characterization techniques, including Raman spectroscopy, atomic force microscopy, and transmission electron microscopy, to reveal diverse and very distinct morphology and structure of AlN films on epitaxial graphene; to understand the growth mechanisms behind; and to accentuate the occurrence of a surface phenomenon of enhanced Raman scattering of graphene in the case of nanostructured AlN films. The nanostructured AlN films developed through the implementation of low deposition temperature of 700oC, while deposition temperatures of up to 1410oC have been implemented to reproduce the typical MOCVD conditions established for the growth of AlN films of high crystal quality on SiC. Low stability of the epitaxial graphene in the MOCVD environment under high temperature conditions (> 1240oC) has been indicated by the present TEM study, yet AlN crystallites grew on the SiC with epitaxial orientation. Few layers of graphene on top of the SiC have been resolved in the overall heteroepitaxial structures obtained at the lower temperatures. Support for this work through FLAG-ERA JTC 2015 project GRIFONE is acknowledged.

X.II.3
14:30
Authors : E. Schilirò (1), R. Lo Nigro (1), S. Di Franco (1), F. Roccaforte (1), I. Deretzis (1), A. La Magna (1), A. Armano (2,3), S. Agnello (2,1), B. Pecz (4), I. G. Ivanov (5), R. Yakimova (5), F. Giannazzo (1)
Affiliations : (1) CNR-IMM, Strada VIII, 5 95121, Catania, Italy (2) University of Palermo, Department of Physics and Chemistry, Via Archirafi 36, 90123 Palermo, Italy (3) Department of Physics and Astronomy, University of Catania, Via Santa Sofia 64, 95123 Catania, Italy (4) Institute for Technical Physics and Materials Science Research, Centre for Energy Research, HAS, 1121 Konkoly-Thege 29-33, Budapest, Hungary (5) Department of Physics, Chemistry and Biology, Linköping University, Linköping SE-58183, Sweden

Resume : Epitaxial graphene (EG) on silicon carbide (SiC) is an excellent channel material for high frequency transistors. Atomic layer deposition (ALD) is the method of choice to obtain uniform and conformal gate insulating films on graphene. Typically, nucleation of ALD layers is promoted by the direct functionalization of graphene surface or pre-deposition of a seed-layer, which, in turns, adversely affect the graphene electrical properties or give rise to insulating films with increased equivalent oxide thickness and interface trapping. In this work, uniform and conformal Al2O3 films were obtained by seed-layer-free thermal ALD at 250 °C on highly homogeneous monolayer (1L) epitaxial graphene (EG) (>98% 1L coverage) grown under optimized high temperature conditions on on-axis 4H-SiC(0001). The enhanced nucleation behavior on 1L graphene is not related to the SiC substrate, but it is peculiar of the EG/SiC interface. Ab-initio DFT calculations showed an enhanced adsorption energy for water molecules on highly n-type doped monolayer graphene, indicating the high doping of EG induced by the underlying buffer layer as the origin of the excellent Al2O3 nucleation. Nanoscale resolution current mapping by conductive atomic force microscopy (C-AFM) showed highly uniform insulating properties of the Al2O3 thin films on 1L EG, with a breakdown field >8 MV/cm. These results will have important impact in epitaxial graphene device technology. This work has been supported by the FlagERA GraNitE project (MIUR grant no. 0001411) and by the CNR/HAS bilateral project GHOST.

X.II.4
14:45 Short Break    
 
SiC Novel Applications : Fabrizio ROCCAFORTE
15:00
Authors : Haiyan Ou 1, Yi Wei 1, Li Lin 1, Abebe Tilahun Tarekegne 1, Weifang Lu 1, Yiyu Ou 1, Berit Herstrøm 2, Flemming Jensen 2, Meng Liang 3, Zhiqiang Liu 3, Xiaoyan Yi 3, Valdas Jakubavicius 4, Mikael Syväjävi 4, Philipp Schuh 5, Peter Wellmann 5
Affiliations : 1) Department of Photonics Engineering, Technical University of Denmark, Ørsteds Plads 345A, Kongens Lyngby DK-2800, Denmark; 2) DTU Danchip, Technical University of Denmark, Ørsteds Plads 347, Kongens Lyngby DK-2800, Denmark; 3) Semiconductor Lighting R&D Center, Institute of semiconductors, CAS, No.A35,QingHua East Road, Haidian District, Beijing, PR China; 4) Department of Physics, Chemistry and Biology, Linköping University, SE-58183 Linköping, Sweden; 5) Materials of Electronics and Energy Technology, University of Erlangen-Nuremberg, 91058 Erlangen, Germany

Resume : The technology breakthrough in high-efficiency blue nitride based LEDs has enabled the rapid market penetration of energy-saving LED white light sources. In this presentation, silicon carbide (SiC) has been explored to emit yellow light and blue light as a new wavelength conversion material for a new type of white LED light source taking advantages of abundancy and good thermal conductivity of SiC. Strong yellow emission from boron and nitrogen co-doped SiC has been demonstrated at room temperature. Blue emission has been investigated from both aluminum and nitrogen co-doping of SiC and porous SiC. Strong blue emission from Al-N co-doped SiC has only been observed at low temperature, while strong blue emission from porous SiC has been achieved at room temperature after optimization of pores formation conditions and surface passivation. White light with color rendering index as high as 81 has been achieved from B-N co-doped SiC with a porous surface under optical pump. A prototype of hybridly integrated warm white is achieved by adhesive bonding of a blue LED on SiC substrate with B-N co-doped fluorescent SiC. At last, a monolithically integrated warm white light source through directly growing near ultraviolet LED on fluorescent SiC by metalorganic vapor chemical vapor deposition is demonstrated. Our original results cover growth of fluorescent SiC, formation of porous SiC, optical characterization of these materials with regard to photoluminescence, low temperature photoluminescence, time resolved photoluminescence and thermally stimulated luminescence, material emission mechanism analysis, carrier dynamics analysis, warm white light source fabrication and characterization. Basing on these results, perspectives are shared.

X.III.1
15:30
Authors : David Beke, Klaudia Horváth, Katalin Kamarás Adam Gali
Affiliations : Wigner Research Centre for Physics; Wigner Research Centre for Physics; Wigner Research Centre for Physics; Wigner Research Centre for Physics;

Resume : Heterogeneous photocatalysts offer great potential for a variety of applications by converting photon energy into chemical energy. However, finding the best material to catalyze photochemical reactions is strenuous owing to numerous factors that should be examined. Both, the electro-optical and photocatalytic behaviors rely on the exciton generation, therefore, photocatalytic properties can influence the electronic and optical properties of systems in real environments, where the contact between a semiconductor and an electrolyte can lead to catalyzed reactions. From the study of the photocatalytic properties, we found that size distribution has an enormous effect on the photocatalytic activity, in other words, on the electrolyte ? surface interaction in SiC. SiC clusters in size range of 1-4 nm show no photocatalytic effect while particles larger than the exciton Bohr radius of SiC can decompose methylene blue in a spectacular way. When we added molecular sized SiC NPs to larger SiC particles or ZnS particles, photocatalytic efficiency was more than two times higher than that of the photocatalyst alone. This result demonstrates that molecular sized semiconductor materials can boost the photocatalytic efficiency of materials by enhancing the exciton generation and separation efficiency. For differently sized SiC particles, a type-I homojunction is formed built up from materials with the same chemical composition in a colloid solution of uniformly charged particles.

X.III.2
 
SiC Processing & Devices : Philippe GODIGNON
15:45
Authors : Vinayak Chavan1, Mary White1, Richard Murphy1, Alan Blake1, Dan O’Connell1, Alan Hydes1, Colin Lyons1, Joe O’Brien1, Enrico Caruso1, Nicolas Cordero1, Lida Ansari1, Feargal Nolan1, Dermot Houston1, Alex Thomas Lonergan2, Colm O’Dwyer2, Scott Monaghan1, Paul K. Hurley1,2, and Farzan Gity1
Affiliations : 1 Tyndall National Institute, University College Cork, Lee Maltings, Dyke Parade, Cork, Ireland 2 Chemistry Department, University College Cork, Cork, Ireland

Resume : As ?smart? systems become more complex, driven by the need to add more functions within a given size, the requirement for novel 3D-integration techniques becomes more focused towards achieving a reduction in power consumption and an enhancement in energy efficiency of the integrated devices. Integrating dissimilar materials with a large lattice mismatch and different material thermal expansion coefficients (i.e., between Si and SiC) limits the deposition or growth techniques in order to avoid a large density of defects at the material interface that significantly degrade the performance of the integrated devices. Also, the growth temperature and/or post-growth anneal steps are non-CMOS compatible, making direct SiC integration with Si devices and circuitry extremely challenging. This study addresses the pressing need for wafer-level heterogeneous integration of SiC on Si with back-end-of-line compatible low-temperature processes (< 300 °C) leading to strain-free and defect-free integrated devices. To explore this technology, electrical properties of the bonded SiC/Si interface are investigated, with particular interest in the role of the interfacial layer in the carrier transport mechanism. N-SiC/P-Si and N-i-SiC/P-Si bonded pairs as fundamental electronic and optoelectronic test devices are fabricated and characterised electrically and optically, resulting in a current transport mechanism being proposed based on comparative modelling. We show that this technology allows both efficient vertical electrical and heat conductivity through the bonded interface in addition to a high optical transmittance without the need to sacrifice one for the other leading to reduced energy consumption and greater device/circuit efficiency. * Science Foundation Ireland is acknowledged for funding this project through grants 17/TIDA/5127 and 12/RC/2278.

X.IVa.1
16:00
Authors : M. Spera 1,2,3), D. Corso 1), S. Di Franco 1), G. Greco 1), A. Severino4), P. Fiorenza1), F. Giannazzo1), F. Roccaforte 1)
Affiliations : 1) CNR-IMM , Strada VIII n. 5 Zona - Industriale - 95121 Catania, Italy; 2) Department of Physics and Astronomy, University of Catania, via Santa Sofia 64, 95123, Catania, Italy; 3) Department of Physics and Chemistry, University of Palermo, via Archirafi 36, 90123, Palermo, Italy; 4) STMicroelectronics, Stradale Primosole, 50, 95121 Catania, Italy Catania Italy

Resume : Ion-implantation is widely used for selective n-type or p-type doping in power devices based on silicon carbide (4H-SiC). Typically, high temperature post-implantation annealing is required to electrically activate the implanted species, i.e., Phosphorous (P) for n-type or Al (Alluminium) for p-type doping. In this work, P and Al ions have been implanted at different energies and fluences to create 200nm thick box-profiles with a concentration of 10^20 at/cm3. The implanted layers have been subjected to activation annealing processes at high temperatures (1675-1825 °C). Upon annealing, only a moderate increase of the surface roughness was detected by AFM. Van der Paw measurements indicated a decrease of the resistivity of both n-type (from 4.3 mOhm.cm to 3.3 mOhm.cm) and p-type (from 0.36 to 0.22 Ohm.cm) layers with increasing the annealing temperature. Room temperature Hall measurements allowed to determine hole concentration in the range 0.65-1.34x10^18/cm^3 and mobility values in the order of 21-27 cm^2/(Vs). Scanning capacitance microscopy (SCM) measurements was employed to determine the depth distribution of electrically active dopants in the n-type implanted layers. On the other hand, the fraction of active dopant in p-type implanted layers, estimated by temperature dependent Hall measurements, ranged between 39% and 56%. The possible implications of these results in the fabrication of 4H-SiC power devices have been discussed.

X.IVa.2
16:15
Authors : Ivan Shtepliuk 1, Mikhail Vagin 1,2, Ziyauddin Khan 2, Ivan G. Ivanov 1, Tihomir Iakimov 1, Bela Pecz 3, Filippo Giannazzo 4, Kostas Sarakinos 1, Rositsa Yakimova 1
Affiliations : 1 Department of Physics, Chemistry and Biology, Linköping University, SE-58183, Linköping, Sweden; 2 Laboratory of Organic Electronics Department of Science and Technology Linköping University, SE-601 74 Norrköping, Sweden; 3 Institute for Technical Physics and Materials Science, Research Centre for Natural Sciences,Hungarian Academy of Sciences, P.O. Box 49, H-1525 Budapest, Hungary; 4 Consiglio Nazionale delle Ricerche, Istituto per la Microelettronica e Microsistemi, Strada VIII, n. 5, Zona Industriale, 95121, Catania, Italy

Resume : Development of energy saving materials and systems with enhanced performance, like smart materials, liquid phase sensors and charge storage devices requires non-traditional concepts of materials design. Integration of epitaxial graphene with SiC can bridge the excellent intrinsic properties of the semiconductor and semimetal, enabling the above-mentioned applications. Furthermore, interfacing this combined system with different metals, e.g. alkali and heavy metals, may allow tunability of electronic and optical properties. Here, we explore the behaviour of selected metals (Li, Ag and Pb) on epitaxial graphene obtained by thermal decomposition of Si-face 4H SiC (0001). We show that the observed effects, related to Ag and Pb, are excellent prerequisites of optical and electrochemical sensing, while lithiation is promising for charge storage. The interaction of metals with graphene was revealed by in depth analysis of Raman spectra, C-AFM and TEM supported by DFT modelling. Significant enhancement of G mode intensity after 15 nm Ag deposition was found due to plasmonic phenomena. Due to its extraordinary chemical and thermal stability, large active surface area and wide potential window, graphene-covered Si-terminated 4H-SiC has an enormous potential to be used effectively as an electrode. Electrochemical performance of the graphene electrode with Pb and Li was studied in detail by using anodic stripping and cyclic voltammetry, and chronoamperometry.

X.IVa.3
 
Symposium X, Poster Session, SiC & Related Materials : Mike JENNINGS, Francesco LA VIA, Peter WELLMANN
16:30
Authors : M Zimbone 1), M. Zielinski 2), E.G.Barbagiovanni 1), C. Calabretta 1) F. La Via 1)
Affiliations : 1) CNR Institute for Microelectronics and Microsystems 95121 - Catania, Italy - Strada VIII, 5, Italy 2) Savoie Technolac - Arche Bat.4 Allée du Lac d'Aiguebelette BP 267 73375 Le Bourget du Lac Cedex, France

Resume : Cubic silicon carbide (3C-SiC) is an emerging material for high current and energy saving devices. The development of this technology is hindered by a high amount of defects that came from the hetero-interface. The difference in expansion coefficient together with the difference in the lattice parameter are responsible for the formation of extended defects as stacking faults micro-twins and grain boundaries that propagate in the epilayer and reduce the quality of the material. The development of high quality 3C-SiC layer is still representing a scientific and technological challenge. In the present lecture, we used a Si1-x Gex buffer layer between epitaxial SiC and Si substrate in order to reduce the defectiveness and improve the overall quality of the epi-film. In particular, we found that the quality of the film depends on the concentration of the segregated Ge at Si1-xGex/SiC interface. Furthermore, in order to avoid segregation, a Si capping layer was introduced between SiGe and SiC. The introduction of the cap layer needs to modify the growth parameter and a new growth procedures was explored. Connection between segregation, thickness of the silicon capping layer and growth parameter are discussed.

X.P/V.1
16:30
Authors : Gheorghe Pristavu, Gheorghe Brezeanu, Razvan Pascu, Florin Draghici, Marian Badila
Affiliations : University Politehnica of Bucharest; University Politehnica of Bucharest; National Institute for Research and Development in Microtechnologies; University Politehnica of Bucharest; University Politehnica of Bucharest;

Resume : After extensive research focus in the last two decades, Silicon Carbide devices and SiC Schottky diodes in particular have become widely commercially available. Despite their proliferation in the field of power electronics, the potential for these devices to operate at very high temperatures, in applications such as industrial drilling and process control or space exploration has yet to be practically exploited. In the case of SiC Schottky diodes, this is partially because of the unstable electrical behavior of the ubiquitously inhomogeneous Schottky contact. This paper investigates the performance impact of Schottky diode non-uniformity in the context of high temperature monitoring industrial applications. Batches of Ni/4H-SiC diodes are fabricated, measured up to 450°C and parameterized using different characterization techniques. Microphysical investigations are carried out in order to assess metal-semiconductor interface quality. The stability of electrical characteristics is also evaluated. Inhomogeneity models are employed in order to accurately describe device behavior over large temperature intervals. Ultimately, conditions for obtaining good sensitivity and high power efficiency are obtained. Thus bias levels and temperature domains are determined, where the SiC Schottky diodes are optimally suitable for high-temperature monitoring. Best performing devices are tested as temperature sensors in a practical industrial application.

X.P/V.2
16:30
Authors : Michael Salamon, Matthias Arzig, Peter J. Wellmann, Norman Uhlmann
Affiliations : Fraunhofer Development Center X-ray Technology, Fürth, Germany; Crystal Growth Lab, University Erlangen-Nuremberg, Erlangen, Germany; Crystal Growth Lab, University Erlangen-Nuremberg, Erlangen, Germany; Fraunhofer Development Center X-ray Technology, Fürth, Germany;

Resume : Today the Physical Vapor Transport process is regularly applied for the growth of bulk SiC crystals. Due to the required high temperature up to 2400 °C and low gas pressure of several mbar inside the crucible, the systems are encapsulated by several layers for heating, cooling and isolation inhibiting the operator from observing the growth. Also the crucible itself is fully encapsulated to avoid impurities from being inserted into the crystal or disturbing the temperature field distribution. Thus once the crucible has been set-up with SiC powder and the seed crystal the visible access to the progress of growth is limited. In the past X-ray radiography has allowed to overcome this limitation by placing the crucible in between an X-ray source and a radiographic film. Recently these two-dimensional attenuation signals have been extended to three-dimensional density distribution by the technique of Computed Tomography. Beside the classic X-ray attenuation signal dominated by Photoelectric Effect, Compton Effect and Rayleigh scattering the X-ray diffraction resulting at the crystalline structure of the 4H-SiC superimpose the reconstructed result. In this contribution the achievable material contrast related to the level of X-ray energy and the absorption effects is analyzed using different CT systems with energies from 125 kV to 9 MeV. Furthermore the X-ray diffraction influence is shown by the comparison between the advanced helical CT method and the classical 3D-CT.

X.P/V.3
16:30
Authors : R. Anzalone, N. Piluso, A. Severino, C. Rapisarda and S. Coffa
Affiliations : STMicroelectronics, stradale primosole 50, 95100 Catania (IT)

Resume : Forward voltage instability has been a major issue in developing high-voltage bipolar devices in SiC. This instability is caused by the expansion of stacking faults (SFs) under forward bias conditions. The basal plane dislocations (BPDs) contained in the basal plane propagate from the substrate into the epi-layer are the primary nucleation source of Shockley-type stacking faults. Dislocations in 4H-SiC substrates include threading screw dislocations (TSDs), threading edge dislocations (TEDs), and BPDs. The Dislocations in the substrate can propagate into the epilayer not only retaining the original dislocation structure but also converting it. The study of the dislocation propagation mechanism is one of the main topics about the 4H-SiC research field. For this experiment 4 commercial 4H-SiC substrates coming from the same ingot (sequential ID: 05, 06, 27 and 46) were used to investigate the dislocation density (TSD, TED and BPD) propagation from substrate to the epi-layer and the dislocation propagation within the ingot. The dislocation were highlighted by KOH etching. The etching is performed in molten KOH inside a nickel crucible at a temperature of 500 °C for a period of 5–10 min. Etch pit densities (EPD) are calculated based on the observation under fully automated (X, Y and Z) optical microscopy (nSPEC by Nanotronics). With a powerful software for the image analysis couples with high-resolution microscope, a whole 6 inches wafer map and the dislocations count and classification were obtained. In this study a good correlation between the dislocation evolution (etch pit density and TSD) within the ingot for substrate (from seed to the ingot-end) and the corresponding epi-layer was found. A correlation for the evolution of EPD and TSD from substrate to the epi-layer was also found. All the experiments results will be presented during the conference.

X.P/V.4
16:30
Authors : Nicolò Piluso, Alberto Campione, Simona Lorenti, Enzo Fontana, M.A. Di Stefano, Salvo Coffa
Affiliations : STMicroelectronics

Resume : The last century has seen a dizzying development in the power device electronic field. The innumerable discoveries in material science have been the propellant that drove the most of innovations which pivot on the physics of semiconductors. Beyond the remarkable discoveries there was always a period where the raw materials have been refined, improved in terms of crystal quality, electrical performance and tuning of the dedicated processes. Today we are living in the Silicon Carbide refinement period. To take advantage of Silicon Carbide (especially 4H-SiC), high crystal quality is strongly request. Epitaxial layers are usually grown on substrates made in 4H-SiC (homoepitaxy). The control of defect density, thickness and doping concentration and their uniformity play a crucial role to ensure the high yield of devices. Strong relationship between growth parameters as Growth Rate, Cool down Ramp, C/Si ratio, buffer layer, growth temperature and electrical parameters as leakage current, breakdown voltage, in MOSFET devices have been observed. In general, high growth rate epitaxial process (HGR) has been compared with standard process (STD) in terms of defect density on epilayer and device yield. The results show an improvement of robustness and reliability of the devices with HGR epi layer. Several trials of further increase of the growth rate (HHGR) have been conducted successful. Also, the cool down ramp step has been explored to decrease defect density and improve the surface condition. The variation of thermal budget and the longest stay (at temperature > 1600 °C) of the sample inside the chamber resulted in a lower morphological small defects density (diameter < 1 µm). Finally, an evaluation of an improvement of doping activation during the cool down ramp is in progress with reference to improvement of dedicated electrical parameters (Vdson).

X.P/V.5
16:30
Authors : Monisha Michael, Aparna Zagabathuni, Sudipto Ghosh, Shyamal Kumar Pabi
Affiliations : Indian Institute of Technology Kharagpur; Indian Institute of Technology Kharagpur; Indian Institute of Technology Kharagpur; Adamas University Barasat

Resume : Nanofluids perform a crucial role in the development of newer technologies ideal for industrial purposes. Hexagonal form of boron nitride (h-BN) has versatile properties, such as chemical inertness, electrically insulating and high in-plane thermal conductivity (~600 W/m-K) makes it a good candidate for heat transfer applications. Considering the fact that h-BN nanofluids are a relatively new class of materials, there are limited studies within the literature in terms of characterization of BN nanofluids. This study comprises the synthesis of ethylene glycol-water mixture (i.e., EG/DW= 80/20, 60/40) based h-BN nanofluids and investigating the effect of particle concentration, temperature and base fluid on thermal conductivity. Synthesized h-BN nanofluids have been characterized by transmission electron microscopy (TEM) and Dynamic light scattering (DLS) studies. Well dispersed EG-water mixture based h-BN nanofluids with different volume fractions loadings between 0.5% and 3% were prepared by a typical two-step method. The thermal conductivity of as-prepared nanofluids was investigated using the standard transient hot-wire method (THW) which showed an enhancement of 13.7% and 13.1% for 3 vol.% of 80/20 and 60/40 EG/DW based h-BN nanofluids. Also, the thermal conductivity enhancement of h-BN nanofluids was found to be weakly dependent on temperature in range 30 ̊ C to 60 ̊ C. The viscosity of the BN nanofluids was also studied and showed an increase with increase in particle concentration.

X.P/V.6
16:30
Authors : I. Shtepliuk (1), F. Giannazzo (2), I. G. Ivanov (1), T. Iakimov (1), A. Kakanakova-Georgieva (1), E. Schilirò (2), P. Fiorenza (2), B. Pecz (3), R. Yakimova (1)
Affiliations : (1) Department of Physics, Chemistry and Biology, Linköping University, SE-581 83 Linköping, Sweden (2) Consiglio Nazionale delle Ricerche, Istituto per la Microelettronica e Microsistemi, Strada VIII, n. 5, Zona Industriale, 95121, Catania, Italy (3) Institute for Technical Physics and Materials Science Research, Centre for Energy Research, HAS, 1121 Konkoly-Thege 29-33, Budapest, Hungary

Resume : Epitaxial graphene (EG) on SiC is a material of choice for electronics, sensing and metrology applications. Many peculiar properties of EG are due to the presence of a carbon buffer layer (BL) covalently bonded to the Si face of SiC. Hydrogen intercalation is a widely used method to detach the BL from the substrate, resulting in a change of the electronic properties (mobility, doping) of EG and of the Schottky barrier at EG/SiC interface. The ability to probe the spatial uniformity of the intercalation and its correlation with the local electrical properties of graphene is mandatory to fully exploit this process for future nano-electronics applications. In this work, micro-Raman mapping and conductive atomic force microscopy (C-AFM) have been jointly applied to investigate the structural and electrical homogeneity of quasi-free-standing monolayer graphene (QFMLG), obtained by high temperature decomposition of 4H-SiC(0001) followed by hydrogen intercalation at temperatures from 900 to 1100 °C. Strain and doping maps, obtained by Raman data, were correlated with nanoscale resolution current maps and local I-V analyses performed by C-AFM. The distribution of Schottky barrier height values at QFMLG/SiC interface was evaluated from local I-V curves using the thermionic emission model. High resolution cross-sectional TEM analyses were also performed to get further insight in the structural properties of the interface. Applications of the demonstrated approach to probe the electrical homogeneity of EG subjected to intercalation with other species (such as ammonia) will be also presented. This work has been supported by the FLAG-ERA projects GRIFONE and GraNitE, and by the CNR/HAS bilateral project GHOST.

X.P/V.7
16:30
Authors : P. Schuh, F. La Via, M. Mauceri, P. J. Wellmann
Affiliations : Crystal Growth Lab Materials Department 6 (i-meet) FAU Erlangen-Nuremberg Martensstr. 7 D-91058 Erlangen Germany, CNR-IMM, sezione die Catania Stradale Primosole 50 I-95121 Catania Italy, LPE S.P.A. Sedicicesima Strada I-95121 Catania Italy, Crystal Growth Lab Materials Department 6 (i-meet) FAU Erlangen-Nuremberg Martensstr. 7 D-91058 Erlangen Germany

Resume : The cubic polytype of SiC shows technological challenges for the bulk-growth such as a high supersaturation, a silicon rich gas phase and a high vertical temperature gradient. However, a significant step for electronic devices like MOSFETs and intermediate band solar cells can be predicted for high quality material due to the high electron mobility and the wide bandgap. A big draw-back for the development of such devices is the lack of bulk material for further processing. We have developed a transfer method for high quality 3C-SiC-on-Si (100) seeding layers on top of a SiC carrier, creating a seeding stack suitable for the use in sublimation “sandwich” epitaxy (SE) and conducted a series of growth experiments material of different quality, increasing the thickness of the epi-layer at different growth-rates. Raman analysis of obtained material shows no influence on the quality by different growth rates however increasing thickness will also expand the dimensions of the protrusion defect limiting the defect free surface area. Characterization of the surface morphology at different growth-rates describes a change in the preferred growth direction from [111] to [100] decreasing the defect density. First attempts of real bulk growth increasing the thickness up to 2.9mm features polytype changes along the [111] planes accompanied by protrusions. Furthermore, occurring backside sublimations indicates the need of a more sufficient protection layer.

X.P/V.8
16:30
Authors : Valdas Jokubavicius, Reza Yazdi, Rositsa Yakimova, Mikael Syväjärvi
Affiliations : Linkoping University, IFM, Linkoping, Sweden

Resume : Cubic silicon carbide (3C-SiC) is attractive for development of various semiconductor device applications mainly due to higher electron mobility and lower bandgap compared to hexagonal counterparts. The potential of this material has been recognized by the European Commission which is financing a collaborative research project” CHALLENGE” (2017-2021) aiming at pushing 3C-SiC growth and device fabrication technologies closer to the market. Previously we demonstrated that high crystalline quality with few domains can be grown on Si-face on 4 degree off-oriented 4H-SiC substrates. However, the large off-orientation limits sample size to less than 10x10 mm2. Therefore, we have explored growth of 3C-SiC on 2-inch hexagonal SiC substrates. In order to control the initial nucleation of 3C-SiC domains, their lateral enlargement on the surface and formation of double positioning boundaries (DPBs) and stacking faults is critical. We present 2-inch growth of 3C-SiC using substrates with off-orientation varying from 0.8 to 2 degrees, as well as the investigation of DPBs formation and propagation in 3C-SiC grown on different polarities of hexagonal SiC substrates. The crystalline quality of 3C-SiC is dependent on growth conditions. We investigated samples using XRD and LTPL techniques, while more detail analysis of defects, especially stacking faults, was obtained using molten KOH etching of grown and cross-sectional surfaces.

X.P/V.9
16:30
Authors : Subin Ahn, Jungwon Bang, Yoonjoo Lee, Wooteck Kwon
Affiliations : Energy & Environment Division, Korea Institute of Ceramic Engineering and Technology

Resume : SiC has been applied to many high technologies because it has good thermal properties such as low thermal expansion coefficient, chemical stability and good thermal shock resistance. SiC microtube has been studied by several researchers. In this study, a SiC microtube was fabricated by forming a SiC layer on a graphite fiber by conversion coating using a carborthermal reaction and then removing carbon. The morphology and mechanical properties of the SiC microtube are shown to vary with the annealing temperature of the SiC coating on the graphite surface. The crystalline, surface and bonding properties were confirmed by XRD, FE-SEM and XPS analysis, respectively.

X.P/V.10
16:30
Authors : F. Roccaforte 1, M. Spera 1,2,3, G. Greco 1, R. Lo Nigro 1, M. Zielinski 4, F. La Via 1, F. Giannazzo 1, P. Fiorenza 1
Affiliations : 1. CNR-IMM, Catania (Italy); 2. Univ. Catania (Italy); 3. Univ. Palermo (Italy); 4. NOVASiC (France)

Resume : Cubic silicon carbide (3C-SiC) is often regarded as a good material for power electronics. However, compared to the mature hexagonal polytype (4H–SiC), 3C-SiC technology still suffers from the influence of the material quality. In this context, metallizations and dielectrics are important building blocks of 3C-SiC power devices (e.g., diodes, MOSFETs), which deserve to be investigated. This work reports on the development and characterization of Ohmic metallizations and gate dielectrics on 3C-SiC layers grown on Si(100) substrates. The Ohmic contact formation was achieved both on n-type and p-type type 3C-SiC, employing annealed Ni and Ti/Al/Ni films. The formation of different phases at the interface and/or in uppermost part of the reacted metal layer (e.g., Ni2Si, Al3Ni2, TiC, ...) was correlated with the changes of the electrical and morphological properties of the contacts. The specific contact resistance was in the range 10-3-10-5 Ω cm2 , depending on the doping level of the 3C-SiC. On the other hand, the electrical properties of thermally grown SiO2 layers were studied by means of I-V and C-V analyses of MOS capacitors. The electrical measurements allowed to estimate values of interface state density in the order of 4-8×1012 cm-2eV-1. A negative shift of the flat band voltage was observed in the MOS capacitors, likely due to the presence of positive charged donor states in the MOS system. Local bias stress tests of the dielectric by conductive atomic force microscopy (C-AFM) allowed to extract a Weibull plot and correlate the oxide properties with the morphology of the 3C-SiC material. This work has been supported by the EU project Challenge (grant agreement n. 720827).

X.P/V.11
16:30
Authors : Hyungtak Kim, Ho-young Cha
Affiliations : Hongik University

Resume : Influence of oxygen-plasma treatment on in situ SiN/AlGaN/GaN MOS heterostructure FET with SiO2 gate insulator was investigated. Oxygen-plasma treatment was performed onto in situ SiN before SiO2 gate insulator was deposited by plasma enhanced chemical vapor deposition (PECVD). DC I-V characteristics were not changed by oxygen plasma treatment. However, pulsed I-V characteristics were improved showing less dispersion compared to non-treated devices. Capture emission time (CET) maps were extracted from measurements of the threshold voltage drift over stress-recovery sequences. CET maps indicated that the density of traps was reduced by the treatment. X-ray photoemission spectroscopy also revealed that SiO2 on in situ SiN with oxygen-plasma treatment has O/Si ratio much closer to the theoretical value. It suggests that oxygen-plasma treatment modified surface condition of SiN layer favorable to SiO2 formation by PECVD.

X.P/V.12
16:30
Authors : Oda Marie Ellefsen*, Matthias Arzig+, Johannes Steiner+, Peter Wellmann+, Paal Runde*
Affiliations : *SIKA, Postbox 113, 4792 Lillesand, Norway +Crystal Growth Lab, Materials Department 6,FAU, Erlangen, Germany

Resume : We have studied the influence of different SiC powder size distributions and the sublimation behavior during physical vapor transport growth of SiC in a 75 mm and 100 mm crystal processing configuration. The evolution of the source material as well as of the crystal growth interface was carried out using in‐site 3D X‐ray computed tomography (75 mm crystals) and in-situ 2D X-ray visualization (100 mm crystals). Beside the SiC powder size distribution, the source materials differed in the maximum packaging density and thermal properties. In this latter case of the highest packaging density the in‐itu X‐ray studies revealed an improved growth interface stability that enabled a much longer crystal growth process. During process time, the sublimation‐recrystallization behavior showed a much smoother morphology change and slower materials consumption as well as much more stable shape of the growth interface than in the cases of the less dense SiC source. By adapting the size distribution of the SiC source material we achieved to significantly enhance stable growth conditions.

X.P/V.13
Start atSubject View AllNum.Add
 
SiC Defects : Peter WELLMANN
08:30
Authors : Michael Dudley
Affiliations : Dept. of Materials Science & Chemical engineering, Stony Brook University, Stony Brook NY 11794-2275, USA

Resume : An overview is presented of defects in PVT Grown bulk SiC crystals. Detailed Synchrotron X-ray Topography analysis shows that the observed defects can be divided into two categories: (a) those produced by phenomena occurring at the moving growth interface and (b) those produced by phenomena occurring behind the growth interface while the crystal is still in the growth chamber. Considering (a), most dislocations piercing the growth interface are simply replicated and extend as the crystal grows. In addition, opposite sign pairs of threading dislocations can be nucleated through the incorporation of inclusions at the interface. Near the crystal periphery, the interface shape can sometimes become convex leading to step bunching and the formation of macrosteps. These macrosteps can deflect threading dislocations onto the basal plane and can also lead to the formation of stacking faults. Considering (b), dislocations behind the growth interface can experience both climb and glide. For example, threading dislocations with a c-component of Burgers vector produced by replication or nucleation processes at the interface can interact with non-equilibrium concentration of vacancies and climb into spiral type configurations. This can sometimes lead to annihilation of segments of these dislocations. In addition, dislocations with Burgers vector 1/3 <11-20> can experience stresses due to thermal gradients leading to glide and, in some cases, multiplication processes. Both basal and prismatic slip can occur depending on the nature of the shear stresses experienced by the cooling crystal. Detailed examples of these processes will be presented. The presentation will be summarized by presenting trends in the densities of defects of all types over the past several years as well as future expectations.

X.VIa.1
09:00
Authors : G. Cristian Vásquez, Augustinas Galeckas, Klaus Magnus Johansen, Lasse Vines, Bengt Gunnar Svensson
Affiliations : University of Oslo, Centre for Materials Science and Nanotechnology, 0318 Oslo, Norway

Resume : The excellent physical and chemical properties of SiC make it an intriguing candidate for top-end UV optoelectronics as well as high power electronics and high frequency devices. Defects in semiconductor materials like SiC play an important role on its properties and understanding their behaviour during materials processing is of great importance for their final applications. Ion tracks are formed during ion implantation and consist of a disordered zone of few nm diameters surrounded by a high density of intrinsic defects. In this work, we have studied the effect of single ion impacts on high quality n-type and p-type SiC single crystals using low dose implantation (<10^9 cm^-2) of Ge or Sn ions with energies up to 2 MeV. The samples were implanted selectively using a patterned mask in order to analyse the transition from crystalline to damaged regions at the sub-micron scale. Optical and electrical characterizations have been performed using hyperspectral cathodoluminescnece (CL) in the temperature range from 80K to 300 K and scanning spreading resistance microscopy, respectively. The results indicate that SiC luminescence responds to doses as low as 10^8-10^9 cm^-2. CL-imaging has revealed localized regions associated with optical manifestation of single ion tracks. Their analysis provides a pathway for further insights into the early stages of ion implantation damage and the role of impurities and generated defects on the electronic and optical properties.

X.VIa.2
09:15
Authors : K. Hayashi 1, M. Goto 1, K. Ohoyama 2, Y. Fukumoto 2, N. Happo 3, M. Lederer 4, P. Wellmann 4
Affiliations : 1 Nagoya Institute of Technology; 2 Ibaraki University; 3 Hiroshima City University; 4 Friedrich-Alexander-University Erlangen-Nürnberg

Resume : Boron is one of the most important dopants used in controlling the properties of semiconductors. However, the local structures around boron are hardly observed using conventional techniques. In order to solve this problem, we developed neutron holography, which can visualize atomic arrangements around light elements, such as hydrogen, lithium and boron. Moreover, we succeeded in recording multiple-wavelength holograms using the time-of-flight technique at the huge neutron facility of Japan, the Proton Accelerator Research Complex (J-PARC) in Tokai, Japan. The multiple wavelength neutron holography provides accurate atomic images. We applied this technique to boron-doped SiC. Since neutron holography uses gamma-rays from boron nuclei, 10B isotope was doped to SiC to observe high-statistical holograms by increasing the gamma-ray intensity. Reconstruction of the environment around boron shows clear atomic images, which can provide clues in determining the site of boron. In my presentation, I will show the principle and apparatus of neutron holography, and discuss the possible structures around boron in SiC.

X.VIa.3
09:30
Authors : Jan Beyer, Masashi Kato, Nadine Schüler, Kay Dornich, Johannes Heitmann
Affiliations : JB, JH: Institute of Applied Physics, TU Bergakademie Freiberg, D-09596 Freiberg, Germany; MK: Department of Electrical and Mechanical Engineering, Nagoya Institute of Technology, Nagoya 466-8555, Japan; NS, KD: Freiberg Instruments GmbH, Delfter Str. 6, D-09599 Freiberg, Germany

Resume : 4H-SiC is an indirect, wide bandgap semiconductor material that receives continued interest and development particularly for application in high voltage devices. A fundamental parameter for the performance of these devices is the minority carrier lifetime in the material. Two of the most common lifetime measurements techniques are time-resolved photoluminescence (TR-PL) and microwave detected photoconductivity decay (MDP or µ-PCD, depending on the instrumental details and measurement conditions). However, their results are often difficult to interpret in relation to different contributing recombination mechanisms, e.g. at the surface, substrate or in the bulk. Investigating free-standing 4H-SiC epilayers both Si- and C-face, we discuss the temperature dependence of the determined decays and their interpretation with regard to the surface recombination, carrier lifetimes and relevant defects contributing to thermally activated lifetime quenching. Generally, MDP decays at low temperature show trap-related multi-ms decay times with two thermal activation energies quenching this signal component. TR-PL of the near bandedge emission (NBE) shows sub-µs decay times with only a slight increase with temperature.

X.VIa.4
09:45 Coffee Break    
 
SiC Defects : Michael DUDLEY
10:15
Authors : E. G. Barbagiovanni, C. Bongiorno, M. Zimbone, C. Calabretta, F. La Via
Affiliations : CNR-IMM, Strada VIII 5, 95121, Catania, Italy

Resume : 3C-SiC is one of the most interesting semiconductor for power electronic and energy saving applications. It may replace the most expensive 4H-SiC for devices that work at low voltage and high current. Nevertheless, the quality of the material is not mature enough for the requirements of the microelectronic industry. The main problems are related to the presence of 2D extended defects as Grain Boundaries (GBs) and Stacking Faults (SFs). The presence of these defects induces high leakage current and deteriorate the devices performances. In this work, we performed structural analyses (XRD, TEM and HRTEM) on the GBs and SFs generated during the growth of 3C-SiC on silicon substrates. We observed GBs that change their “lying” plane in a complicated manner by moving between {110}, {111} and {100} planes. Furthermore, the crystals of the two adjacent grains, constituting the boundary, are rotated of 180o with respect to [100] forming a particular kind of GB called Anti-Phase Grain Boundary (APB). We observed that APB are incoherent in nature and can generate and/or annihilate stacking faults (SFs). A simple model is proposed to explain the interaction between complex-APBs and SFs.

X.X-VIb.1
10:30
Authors : F. Giannazzo (1), P. Fiorenza (1), M. Spera (1,2,3), G. Greco (1), M. Zielinski (4), F. La Via (1), F. Roccaforte (1)
Affiliations : (1) Consiglio Nazionale delle Ricerche – Istituto per la Microelettronica e Microsistemi (CNR-IMM), Strada VIII, n.5 Zona Industriale, I-95121 Catania, Italy (2) Department of Physics and Astronomy, University of Catania, Via Santa Sofia, 64, 95123, Catania, Italy (3) Department of Physics and Chemistry, University of Palermo, Via Archirafi, 36, 90123, Palermo, Italy (4) NOVASiC, Savoie Technolac, BP267, F-73375 Le Bourget-du-Lac Cedex, France

Resume : Today, the research on cubic silicon carbide (3C-SiC) is focused on the reduction of macroscopic defects, that can affect the electronic quality of the material and, hence, the performances of power devices. Scanning probe microscopy characterizations (e.g., conductive atomic force microscopy (CAFM), scanning capacitance microscopy (SCM) and scanning spreading resistance microscopy (SSRM)) are powerful techniques providing nanoscale resolution mapping of the electronic properties. In this work, these techniques, together with conventional devices characterization, have been used to extract the relevant electrical properties (conductivity, doping) of 3C-SiC, elucidating also the role played by materials defects. First cross-sectional SCM and SSRM analyses were employed for electrically active dopant profiling in 3C-SiC. The characterization of appropriate epitaxial 3C-SiC calibration samples with different n- and p-type doping levels has been performed to assess the sensitivity and the dynamic range of these techniques for 3C-SiC. Application to relevant epitaxial or implanted 3C-SiC samples will be discussed. Then, plan-view CAFM current mapping and local I-V analyses have been performed both on 3C-SiC heteroepitaxial layers grown on on-axis and off-axis Si substrates, and on bulk 3C-SiC material. The comparison with the surface morphology allowed to identify electrically active defects extending from the bulk (or the heterointerface with Si) to the 3C-SiC surface. Finally, these nanoscale information, compared with I-V analyses on macroscopic Pt/3C-SiC diodes of different area fabricated on the same samples, shed light on the density of electrically active defects limiting the performances of Schottky contacts. This work has been supported by the EU project Challenge (grant agreement n. 720827).

X.X-VIb.2
10:45
Authors : Michael SCHOELER, Maximilian LEDERER, Clemens BRECHT, Peter J. WELLMANN
Affiliations : Crystal Growth Lab, Materials Department 6 (i-MEET), Friedrich-Alexander-University (FAU), Martensstr.7, Erlangen 91058, Germany

Resume : Cubic silicon carbide (3C-SiC) is as well as hexagonal SiC, an excellent material for power electronics, due to its unique physical properties. However, in recent times 3C-SiC is gaining more and more interest in terms of applications for optoelectronics and quantum technologies. 3C-SiC exhibits a number of luminescent defects in the near infrared region that originate from various deep electronic levels. These structures originate from intrinsic point defects as well as defect complexes of intrinsic and extrinsic defects and can be incorporated during growth. 3C-SiC is much more difficult to grow in high crystalline quality than their commercially available hexagonal counterparts, especially 4H-SiC and 6H-SiC. We used sublimation epitaxy to grow doped and undoped samples of (100) and (111) oriented 3C-SiC of several hundred micrometers thickness. Temperature dependent photoluminescence measurements revealed the presence of vacancy related defects. Moreover, we found that the presence of distinct defects depends on growth conditions. The observed defects in 3C-SiC are believed to have significant impact on future applications in optoelectronics and quantum technology.

X.X-VIb.3
11:00 PLENARY SESSION 1    
12:30 Lunch    
 
SiC Modeling & Defects : Emilio SCALISE
13:45
Authors : Stefan Sandfeld1 , Binh Duong Nguyen1, Alexander Rausch2
Affiliations : 1Institute of Mechanics and Fluid Dynamics, The Micromechanical Materials Modelling group, Technische Universität Bergakademie Freiberg (TUBAF), Lampadiusstraße 4, 09596 Freiberg, Germany 2 Chair of Materials Science and Engineering for Metals (WTM), Friedrich-Alexander-Universität Erlangen-Nürnberg (FAU), Martensstraße 5, 91058 Erlangen, Germany

Resume : The performance and quality of electronic devices is strongly influenced by defects, inluding dislocations – linear lattice defects. Modeling the defect evolution of such systems helps to understand relevant mechanisms and might allow to avoid – or at least to reduce – the number of line defects in such materials. In this presentation we start by discussing the current state of the art in terms of modelling approaches of dislocations in semiconductors. This includes the Alexander-Haasen model which describes the evolution of dislocation density through a local dislocation multiplication law and which does not consider propagation of dislocations. We then discuss the underlying assumptions for the validity of such local evolution laws and show how the shortcommings can be overcome by a more complex continuum model of dislocation dynamics. Both approaches will be compared based on a simplified model of a 4H-SiC crystal and critically discussed.

X.VIIa.1
14:00
Authors : M. Albani, R. Bergamaschini, E. Scalise, F. Montalenti, L. Miglio
Affiliations : L-NESS and Dept. of Materials Science, University of Milano-Bicocca 20125 Milano, Italy

Resume : Three-dimensional epitaxy of 3C-SiC on micron-sized Si pillars is an ideal case to investigate its faceting and growth mode on Si, without the geometry constraint of a planar film. Experimental results show that prismatic 3C-SiC crystals grow with very pronounced faceting, dominated by {111} planes and smaller {001}. It is found that such a strong anisotropy cannot be simply explained by the hierarchy of surface energies, here computed by ab-initio calculations, but stems from facet-dependent kinetic effects. A continuum phase-field model of crystal growth is then exploited to deal with the competition of the different facets during deposition and to reproduce the experimental morphologies. Kinetic parameters are refined by matching the simulated profiles to the experimental ones and their general validity is confirmed by considering different pillar shapes, sizes and crystallographic orientations. The coalescence of 3C-SiC crystals grown on top of closely spaced pillars is also analyzed by simulations. A comparison with literature results of Si and Ge growth on the same Si pillar structures is reported to highlight the peculiar properties of 3C-SiC with respect to other group-IV semiconductors. Authors acknowledge EU program H2020-NMBP-02-2016, CHALLENGE project, grant n. 720827.

X.VIIa.2
14:15
Authors : G. Fisicaro, I. Deretzis, F. La Via and A. La Magna
Affiliations : Consiglio Nazionale delle Ricerche - Istituto per le Microelettronica e Microsistemi Z.I. VIII Strada 5, I95121 Catania, Italy

Resume : The growth of high-quality Silicon Carbide (SiC) substrates and nanoparticles is a topic of extreme technological interest due to the importance of this material for current and future technologies. Concurrently, such growth process is challenging due to the meta-stability of different crystal symmetries (polytypes) in the usual growth conditions. We report a multiscale theoretical analysis designed to study at an atomic resolution the growth kinetics of compounds characterized by the sp3-type bonding symmetry. First we explored the configurational space of cleaved and defective (adatoms and vacancies) surfaces with ab-initio structure predictions algorithms at density functional theory level. Then the atomistic configurations and energetics are input of a kinetic superlattice Monte Carlo code which simulates the growth kinetics of SiC substrates and nanoparticles. We explored several calibration paradigms starting from the ab-initio data. Formalization and implementation details are presented for the particular case of the 3C-SiC material. A key feature of this numerical tool is the ability to simulate the evolution of both point-like and extended defects. The simulations can describe the surface state of the crystal and the generation/evolution of defects. Quantitative predictions of the microstructural evolution of the studied systems can be readily compared with the structural characterization of actual processed samples.

X.VIIa.3
14:30
Authors : Razvan Pascu1, Mihaela Kusko1, Cosmin Romanitan1, Petre Osiceanu2, Gheorghe Pristavu3, Gheorghe Brezeanu3
Affiliations : 1.National Institute for Research and Development in Microtechnologies; 2. ‘Ilie Murgulescu’ Institute of Physical Chemistry, Romanian Academy 3.Electronics, Telecommunications and Information Technology, University Politehnica Bucharest.

Resume : The oxide growth process on SiC represents a technological challenge, especially due to the poor quality of the SiO2/SiC interface. In this context, we systematically analysed the applicability of the polyoxides obtained via a two steps process consisting on preliminary deposition of an amorphous silicon thin film and oxidation at a softening temperature of a grown SiO2 on SiC (1100°C). Therefore, in order to prove the high quality of the resulted polyoxides, both structural and electrical investigations were performed. The X-ray reflectivity and X-ray photoelectron spectroscopy analyses revealed that the thickness of the SiO2/SiC interfacial layer, where these traps originate, becomes almost three-fold smaller in the case of our proposed method in comparison with the standard grown oxide on SiC. The electrical measurements performed on the MOS capacitors further support these observations, showing a remarkable correspondence: the “polyoxide” sample, with three-fold thinner interface layer led to a three-fold reduction of the total interface trap density. Moreover, the densities of the near interface oxide traps lie in the range of 1011 − 1013 cm−2eV−1 for all the investigated structures, and these results are confirmed by the doping profile and the net charge density distribution in depletion region, which finally control the stability of the SiC MOS devices. Thus, we showed that the novel process flow assures not only cost-related benefits, but also, a significant improvement achieved for the electrical properties of the resulted oxide layers, principally due to the reduced amount of the effective oxide charges, the interface traps and the near interface oxide traps.

X.VIIa.4
14:45
Authors : Moonkyong Na 1, Wook Bahng 1, Juyeon Keum 1, In Ho Kang 1, Jung Hyun Moon 1, Han Seok Seo 2, Tai Hee Eun 2, Myoung Chul Chun 3
Affiliations : 1 Korea Electrotechnology Research Institute (KERI), Changwon, 51543, Korea; 2 Research Institute of Industrial Science & Technology (RIST), Pohang, 37673, Korea; 3 POSCO, Seoul, 06194, Korea

Resume : Silicon carbide (SiC) is an attractive semiconductor material for high-power and high-temperature electronic devices due to its physical properties [1]. However, the development and commercialization of SiC-based devices are delayed due to the defects in SiC materials. Single crystal growth technology has been developed to reduce the killer defects such as micropipes and triangular defect which degrade the device performance. It has been also progressed on the epitaxial growth technology to reduce the surface defects. Previous studies are mainly focused the effect of the specific defects in the epitaxial layer on the electrical characteristics of SiC devices [2-4]. Most of the researches of the defects in the substrate are related on the improvement of single crystal and epitaxial layer quality [5]. The studies about the relationship between the defects in the substrate and the electrical performance of devices are still insufficient. In this study, we investigated the effect of the defects in the substrate on the electrical characteristics of 4H-SiC Schottky barrier diodes (SBDs). We fabricated the SBDs with wafers having different defect densities. The electrical properties of fabricated SBDs were analyzed with defect map. The SBDs were fabricated on a n-type 4H-SiC epitaxial wafer. The thickness of epitaxial layer was 7, 10 um and its doping concentration 8 × 1015, 5 × 1015 cm-3, repectively. Schottky metal, Ni, is deposited and then wet-etched to define the active regions. The defects in substrate and after epitaxial growth were analyzed using X-ray toprgraphy at 9D beamline in Pohang Accelerator Laboratory (PAL). The non-destructive methods including electron beam induced current (EBIC) and surface detection by SICA® were used to observe the defects in SiC materials. The current-voltage measurements were performed for forward and reverse characteristics by HP4156B and high voltage analyzer. The Schottky barrier height (SBH) and ideality factor (IF) were extracted from forward characteristics. We analyzed the electrical characteristics of fabricated SBDs with two differnet wafers, where 600 SBDs were fabricated each wafer. SBH of SBDs was strongly influenced by the doping concentration of the epi layer. The SBH and ideality factor of SBDs were narrow distribution at the low defect density substrate. While the distribution of parameters at high defect density substrate were spread at wide range. The failure of devices and high leakage current were frequently observed at the SBDs fabricated using the high defect density substrate. As already known, the forward electrical properties were expected as a result with the surface defects of the epitaxial layer. Large particle and triganular defect degraded the forward electrical properties. They also affected the reverse electrical properties, such as increasing the leakage current and lowering the blocking voltage. We will present the detaild effect of the defects in substrate on the electrical characteristics of SiC devices. References 1. K. Vassilevski, I. Nikitina, N.Wright, A. Horsfall, A. G. O’Neill, and C. Johnson, Microelectronic Eng., 83, 150 (2006). 2. M. Na, J. Keum, J. H. Moon, I. H. Kang, and W. Bahng, ECS transaction, 85 (7), 59 (2018). 3. H. J. Jung, S. B. Yun, I. H. Kang, J. H. Moon, W. J. Kim, W. Bahng, Mater. Sci. Forum. 821-823, 563 (2015). 4. T. Katsuno, Y. Watanabe, H. Fujiwara, M. Konishi, T. Yamamoto, and T. Endo Jpn. J. Appl. Phys., 50, 04DP04 (2011). 5. I. Kamata, H. Tsuchida, T. Jikimoto, and K. Izumi, Jpn. J. Appl. Phys., 39, 6496 (2000).

X.VIIa.5
15:00 Short Break    
 
SiC Modeling & Defects : Stefan SANDFELD
15:15
Authors : Luca Barbisan {1}, Anna Marzegalli {2}, Andrey Sarikov {1}{3}, Francesco Montalenti {2}, and Leo Miglio {3}
Affiliations : {1} Dipartimento di Scienza dei Materiali, Università degli Studi di Milano-Bicocca, via R. Cozzi 55, 20125 Milano, Italy; {2} L-NESS and Dipartimento di Scienza dei Materiali, Università degli Studi di Milano-Bicocca, via R. Cozzi 55, 20125 Milano, Italy; {3} V. Lashkarev Institute of Semiconductor Physics, National Academy of Sciences of Ukraine, 45 Nauki avenue, 03028 Kiev, Ukraine

Resume : Quality improvement of 3C-SiC material is at present a rapidly growing and intensively exploited field of research. One of the main issues to be solved stems in the high density of extended defects such as dislocations and stacking faults (SFs). The lack of a proper understanding of defects behavior has limited the possibility to overcome these issues. We show that large-scale molecular-dynamics (MD) simulations can strongly help in rationalizing such a complex behavior. After having implemented a script allowing for the insertion of partial dislocation loops within the Large-scale Atomic/Molecular Massively Parallel Simulator LAMMPS [1], we carried out an extensive set of MD simulations based on the Vashista potential [2]. The latter is particularly well suited to investigate defects such as SFs because it allows one to differentiate the energy of SiC hexagonal versus cubic phases. From trajectory analysis we were able to directly observe the evolution of the initial loop, establishing a direct link between its dynamic behavior and the formation of multi-plane SFs in 3C-SiC, therefore shedding light on the formation of such commonly observed defects. In particular we found that an already developed loop locally lowers the energy barriers for the nucleation of another adjacent loop. *Authors acknowledge EU program H2020-NMBP-02–2016, CHALLENGE project, grant n. 720827 [1] S. Plimpton, J Comp Phys, 117, 1-19 (1995) [2] P. Vashishta et al., J App Phys, 101, 10 (2007)

X.VIIb.1
15:30
Authors : Emilio Scalise, Anna Marzegalli, Francesco Montalenti, Leonida Miglio
Affiliations : Department of Materials Science, University of Milano Bicocca

Resume : SiC technology has became mature and it is now a good alternative to standard silicon technology for the power electronics industry, but some fundamental aspects of this material still lack physical understanding. Particularly polytypism and growth of SiC polytypes have been discussed as a paradox from about thirty years because of an evident discrepancy between theory and experiments, not yet elucidated. SiC has more than 200 polytypes and few of them (i.e. 3C, 6H, 4H) are commercially available and used for power devices. Besides the scientific interest, investigating SiC polytypism and understanding its driving force is crucial to correctly predict the energetics of extended defects in SiC, which are one of the main concerns of this wide band gap semiconductor. We perform first-principle simulations and including the long range Van Der Waals interactions and the entropic contributions to the crystal free energy, we predict the temperature dependent thermodynamic stability of different SiC polytypes which may explain their growth at different temperature. Then, we estimate the formation energy of stacking faults in SiC and the effect of Van Der Waals corrections are proved to be key for reproducing experimental observations. Our estimations are substantially different than the energy values typically considered in previous studies of phase transitions and stacking faults in SiC polytypes and thus they may be fundamental to reinterpret important aspects of this material. Authors acknowledge EU program H2020-NMBP-02–2016, CHALLENGE project, grant n. 720827.

X.VIIb.2
15:45
Authors : I. Deretzis, G. Fisicaro, M. Zimbone, E. Barbagiovanni, F. La Via, A. La Magna
Affiliations : CNR-IMM, VIII strada 5, 95121 Catania, Italy

Resume : Since the early days of research on silicon carbide, stacking faults (SFs) have almost monopolized the interest of the SiC community due to their extremely low formation energies and recurrent presence in the various SiC polytypes. The corresponding defect-induced states within the band gaps of the hexagonal polytypes have delayed the development of reliable SiC devices for a long time. Unlike hexagonal SiC, SFs do not introduce intra-gap states within the cubic SiC polymorph, making their presence less critical for the operation of 3C-SiC devices. Here we show that a different type of two-dimensional SiC defect, i.e. the antiphase boundary, can introduce both shallow and deep level states within the 3C-SiC bandgap. Our study is based on the density functional theory, whereas results are compared with the structural and electrical characterization of 3C-SiC samples. We show that antiphase boundaries towards the <110> and <111> directions give rise to a local structural perturbation and introduce defect states with resonances that span from the vicinity of the valence band up to mid-gap positions. Considering their spatial extension, such defects can have an important role in the electrical properties of 3C-SiC devices.

X.VIIb.3
16:00
Authors : Andrey Sarikov {1, 2}, Anna Marzegalli {3}, Luca Barbisan {1}, and Leo Miglio {3}
Affiliations : 1 Dipartimento di Scienza dei Materiali, Università degli Studi di Milano-Bicocca, via R. Cozzi 55, 20125 Milano, Italy 2 V. Lashkarev Institute of Semiconductor Physics, National Academy of Sciences of Ukraine, 45 Nauki avenue, 03028 Kiev, Ukraine 3 L-NESS and Dipartimento di Scienza dei Materiali, Università degli Studi di Milano-Bicocca, via R. Cozzi 55, 20125 Milano, Italy

Resume : A key issue in the technology of cubic SiC (3C-SiC) material for electronic device applications is to understand the behavior of extended defects such as partial dislocation (PD) complexes and stacking faults (SFs). In this work, high temperature extended defect evolution is studied by molecular dynamics simulations using two different potentials describing the interaction of Si and C atoms: Vashishta and analytical bond-order potential (ABOP). Use of Vashishta potential provides more realistic description of the defect behavior due to the non-zero SF energy resulted from account of second-nearest-neighbor atomic interaction. On the other hand, ABOP was demonstrated to be more efficient in predicting the reconstruction of dislocation core structures. Key aspects of the extended defect evolution have been considered including: (i) partialization of 60° perfect dislocations with formation of 30° PD/SF/90° PD structures, (ii) dependence of PD motion velocity on the dislocation Burgers vector and atomic composition of core, (iii) relative stability of double and triple PD complexes etc. Differences in results obtained with two used potentials are discussed. Synergetic application of both Vashishta potential and ABOP is demonstrated to provide more comprehensive understanding of the extended defects evolution in 3C-SiC as compared to that achieved with application of any of the potentials alone. *Authors acknowledge EU program H2020-NMBP-02–2016, CHALLENGE project, grant n. 720827.

X.VIIb.4
16:15 Coffee Break    
 
SiC Processing & Devices : Mike JENNINGS
16:45
Authors : Philippe Godignon
Affiliations : Centro Nacional de Microelectronica (CNM-CSIC), Carrer dels Tillers, Campus UAB, 08193 Cerdanyola, Barcelona - Spain

Resume : Silicon Carbide power devices are still, today, the more advanced wide band gap based components, in terms of development and industrialization. A wide variety of devices have been demonstrated, from Schottky diodes to very high voltage (25kV) switches. Regarding commercial diodes performances, ideal unipolar limits have been reached and current research is now oriented to bipolar conduction rectifiers. Concerning power switches, the originally developed high performances JFET and bipolar transistors have been almost completely knock out by the availability of relatively reliable power MOSFETS. Both planar and trench power MOSFETs technologies have been successfully developed. Novel superjunction power MOSFETs are now under scope of investigation, but require new processing approaches. However, SiC MOSFETs still suffer from weaknesses like poor short circuit capability and low reliability at operation temperatures higher than 150ºC. Indeed, despite what is claimed by some manufacturers, available commercial devices are still far from their ideal unipolar characteristics. Moreover, for voltages higher than 6kV, the MOSFET is not any more a solution, except in low current applications. IGBT, the ideal high power devices in Silicon technology, should be also a potentially performant power switch in SiC, but the IGBT implementation, in its current form, require today a too complex and costly technology. So why not giving a second life to SiC thyristors and bipolar transistors. Their processing is simpler, cost effective, but highly depends on the starting material quality.

X.IVb.1
17:15
Authors : Paolo Badalà 1, Simone Rascunà 1, Brunella Cafra 1, Emanuele Smecca 2, Massimo Zimbone 2, Anna Bassi 1, Corrado Bongiorno 2, Cristiano Calabretta 2, Fabrizio Roccaforte 2, Francesco La Via 2, Mario Saggio 1, Antonino La Magna 2 and Alessandra Alberti 2
Affiliations : 1 STMicroelectronics, Zona Industriale Stradale Primosole, 50 - 95121 Catania, Italy 2 CNR-IMM, Zona Industriale Strada VIII, 5 - 95121 Catania, Italy

Resume : The next generation of SiC MOSFETs and SBDs devices will require significant thinning of wafers, in order to get thermal and electrical improvements on devices performances. The substrate thinning down to 110 µm, while reducing the substrate contribution to RON, entails a new manufacturing approach, including the replacement of RTA with a new front side-compatible method for backside contact formation. Nickel silicide-based ohmic contact formation by laser annealing has been investigated. A 308 nm wavelength excimer laser has been used since the penetration depth of this range of UV radiation in SiC is very limited (< 5 µm). The reaction process has been studied as a function of as deposited Ni thickness and laser energy density, by means of TEM, XRD and Raman analyses. A strong dependence of morphology and structural properties of the reaction products on Ni thickness has been revealed. Laser process simulations have been performed in order to predict the temperature evolution and the material modifications during the irradiation. Modelling results confirm the overall characterizations’ scenario. The electrical characterization of SBDs devices confirms the ohmic behavior of the obtained laser annealed contact, showing an improvement of the electrical performance with respect to what found by applying a standard thermal annealing. Laser annealing process represents a suitable solution for the formation of backside ohmic contact on SiC power devices fabricated on thin wafers.

X.IVb.2
17:30
Authors : C. Calabretta1-2), M. Zimbone2), S. Boninelli2), A. Pecora3), A. Castiello3), G. Fortunato2), L. Calcagno4), L. Torrisi1), and F. La Via2)
Affiliations : 1) MIFT, Università degli studi di Messina, Viale F. Stagno d’Alcontres, 31 - 98166 Messina, Italy; 2) CNR-IMM, VIII Strada, 5, 95121 Catania, Italy; 3) CNR-IMM, Via del Fosso del Cavaliere, 100 - 00133 Roma; 4) DFA, Università degli studi di Catania, Via S. Sofia 64, 95123 Catania, Italy;

Resume : Through new improvements in SiC crystal growth and processed technology, the manufacturing of powered metal-oxide-semiconductor field-effect transistors (MOSFETs) has begun. Source and body regions in MOSFETs are achieved by ion implantation and subsequent mandatory thermal annealing at T > 1600 °C. However, in this temperature regime generation of C interstitial-vacancies couples is registered along the whole epitaxial layer, affecting carriers mobility and lifetime especially in channel region. In addition, a network of dislocation loops is also produced in the implant projected range together with low dopant activation rates. To work around this problem pulsed-laser-based methods have been applied for post-implant annealing of n-type P-doped 4H–SiC epitaxial layers in order to recover the crystal structure and to electrically activate the doping species. The annealing was performed with XeCl ecximer laser source (308 nm) with 40 Hz pulse and 1000 shots/point. Samples were characterized by micro-raman spectroscopy under surface backscattering, photoluminescence, scanning electron microscopy (SEM) and transmission electron microscopy (TEM). Results show how laser annealing (L.A.) process, under submelting conditions, allows to obtain 4H-SiC post implant lattice recovery with much lower point defects concentration than conventional furnace annealing. The outcome of this work proves the viability of L.A. as better substitute for conventional post implant thermal treatments.

X.IVb.3
17:45
Authors : Anna Regoutz
Affiliations : 1 Department of Materials, Imperial College London, Exhibition Road, London SW7 2AZ, United Kingdom.

Resume : SiC is one of the prototypical wide bandgap semiconductors and has immense potential in high power applications. One of the greatest advantages and disadvantages of SiC to date is its native oxide, SiO2. The SiC/SiO2 interface remains a challenge for devices, as its high defect densities lead to detrimental effects on device performance. A variety of high temperature treatments in various atmospheres has been shown to compensate defects and increase device performance. However, information on the local chemistry at the interface after such processes is scarce, which limits the understanding of the interface and consequently the targeted improvement of device characteristics. The present work uses both soft and hard X-ray photoelectron spectroscopy (XPS) to systematically study the elemental distributions and chemical environments across the 4H-SiC/SiO2 interface after high temperature treatments in a variety of nitrogen-containing atmospheres, including N2, NO, NH3, and a NO/NH3 combination. The results from spectroscopy are correlated with electrical measurements, providing new, detailed insights into the relationship between interface chemistry and device behaviour.

X.IVb.4
18:00
Authors : Peter J Ward(*), Ahmed Nejim(**)
Affiliations : (*) PWCE, Wesum House, Hemington, Peterborough PE8 5QJ, UK. (**) Silvaco Europe Ltd, Compass Point, St. Ives, Cambridgeshire, PE27 5JL, UK.

Resume : The intrinsic material properties of the cubic 3C-SiC can be exploited by device designers compared to 4H-SiC. 3C-SiC material has demonstrated higher carrier mobilities than 4H-SiC resulting in higher MOSFET channel current densities as well as higher Vt values. The smaller bandgap of 3C-SiC compared to 4H-SiC produces lower Body Diode turn-on voltages in reverse conduction mode. Further, due to the isotropic nature of charge conduction in 3C-SiC (mobility and impact ionization) complex lateral designs can be explored. In comparison 4H-SiC material exhibits anisotropic charge transport which mandates stripe cell designs, planar or trench gate. Anvil Semiconductors Ltd., has designed and fabricated hexagonal MOSFET cell designs in 3C-SiC, and here comments on the fabrication practicalities will be made. This design produced low specific ON resistance when compared with equivalent stripe design devices. The fabrication flow was implemented in the Silvaco VictoryProcess 3D simulator to generate cell structures using the various device layouts. Once created, these device structures were re-meshed using VictoryMesh to generate the unstructured Delaunay mesh for the drift-diffusion simulations. Selective mesh refinements using linear gradient from the doping junctions as well as the semiconductor-insulator interface were used. Optimisation of the mesh density is necessary to expedite these simulations. Due to the wide band gap nature of the 3C-SiC material, extended precision numerics were used as well as multicore parallel computations using 32 threads. The authors will present DC simulation data from the hexagonal cell and an equivalent area stripe demonstrating the feasibility and advantages of the Hex cell design and fabrication technology for 3C-SiC.

X.IVb.5
18:15 CLOSING REMARKS of SYMPOSIUM X    

No abstract for this day

No abstract for this day

No abstract for this day


Symposium organizers
Francesco LA VIACNR-IMM sezione di Catania

Strada VIII 5 - Zona Industriale, I-95121 Catania, Italy

+ 39 095 5968229
laviafrancesco@gmail.com
Mike JENNINGSUniversity of Warwick

School of Engineering, Coventry, CV4 7AL UK

+44 2476 522266
m.r.jennings@warwick.ac.uk
Peter WELLMANNFriedrich-Alexander University of Erlangen-Nürnberg

Materials Department 6, Martensstr. 7, D-91058 Erlangen, Germany

+49 9131 8527635
peter.wellmann@fau.de